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LT1499CS 数据表(PDF) 14 Page - Linear Technology |
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LT1499CS 数据表(HTML) 14 Page - Linear Technology |
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14 / 20 page ![]() LT1498/LT1499 14989fe 14 APPLICATIONS INFORMATION Figure 1. LT1498 Simplified Schematic Diagram Input Offset Voltage The offset voltage changes depending upon which input stage is active. The input offsets are random, but are trimmed to less than 475μV. To maintain the precision characteristics of the amplifier, the change of VOS over the entire input common mode range (CMRR) is guaranteed to be less than 425μV on a single 5V supply. Input Bias Current The input bias current polarity also depends on the input common mode voltage, as described in the previous sec- tion. When the PNP differential pair is active, the input bias currents flow out of the input pins; they flow in opposite direction when the NPN input stage is active. The offset error due to input bias current can be minimized by equalizing the noninverting and inverting input source impedances. This will reduce the error since the input offset currents are much less than the input bias currents. Overdrive Protection To prevent the output from reversing polarity when the input voltage exceeds the power supplies, two pair of crossing diodes D1 to D4 are employed. When the input voltage exceeds either power supply by approximately 700mV, D1/D2 or D3/D4 will turn on, forcing the output to the proper polarity. For the phase reversal protection to work properly, the input current must be less than 5mA. If the amplifier is to be severely overdriven, an external resistor should be used to limit the overdrive current. Furthermore, the LT1498/LT1499’s input stages are pro- tected by a pair of back-to-back diodes, D5/D6. When a differential voltage of more than 0.7V is applied to the inputs, these diodes will turn on, preventing the Zener breakdown of the input transistors. The current in D5/D6 should be limited to less than 10mA. Internal resistors R6 and R7 (700Ω total) limit the input current for differential input signals of 7V or less. For larger input levels, a re- sistor in series with either or both inputs should be used to limit the current. Worst-case differential input voltage usually occurs when the output is shorted to ground. In addition, the amplifier is protected against ESD strikes up to 3kV on all pins. Capacitive Load The LT1498/LT1499 are designed for ease of use. The amplifier can drive a capacitive load of more than 10nF Q4 Q6 VBIAS D6 D5 +IN D2 Q3 Q7 Q1 I1 Q9 Q2 D4 D1 D3 –IN OUT V– V+ Q5 Q12 Q10 Q8 Q14 14989 F01 C1 R1 R6 R3 V– CC R4 R5 C2 R2 Q11 Q13 Q15 BUFFER AND OUTPUT BIAS R7 |
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