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MAXQ314 数据表(PDF) 6 Page - Maxim Integrated Products

部件名 MAXQ314
功能描述  Single-Phase Power-Measurement IC with I2C Interface
PDF  16 Pages
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制造商  MAXIM [Maxim Integrated Products]
网页  https://www.maximintegrated.com/en.html
标志 MAXIM - Maxim Integrated Products

MAXQ314 数据表(HTML) 6 Page - Maxim Integrated Products

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Single-Phase Power-Measurement
IC with I2C Interface
6 ______________________________________________________________________________________
I2C BUS CONTROLLER TIMING
(VDVDD = 3.0V to 3.6V, TA = +25NC, unless otherwise noted. Typical values are at VDVDD = 3.3V, TA = +25NC.) (Note 1, Figure 2)
Note 1: Specifications guaranteed, but not production tested.
Note 2: All parameters tested at TA = +25NC. Specifications over temperature are guaranteed by design.
Note 3: A master device must provide a hold time of at least 300ns for the SDA signal (referred to VIL of the SCL signal) to bridge
the undefined region of SCL’s falling edge.
Note 4: ISINK P 6mA. tR_I2C and tF_I2C measured between 0.3 x VDVDD and 0.7 x VDVDD.
Note 5: CB = Total capacitance of one bus line in pF.
Note 6: Guaranteed by design. Input filters on the SDA and SCL pins suppress noise spikes less than 50ns.
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Serial Clock Frequency
fSCL
400
kHz
Bus Free Time Between a STOP
and a START Condition
tBUF
1.3
F
s
Hold Time (Repeated) START
Condition
tHD:STA
0.6
F
s
Repeated START Condition
Setup Time
tSU:STA
0.6
F
s
STOP Condition Setup Time
tSU:STO
0.6
F
s
Data Hold Time
tHD:DAT
(Note 3)
0.9
F
s
Data Setup Time
tSU:DAT
120
ns
SCL Clock Low Period
tLOW
1.3
F
s
SCL Clock High Period
tHIGH
0.6
F
s
Rise Time of Both SDA and SCL
Signals Receiving
tR_I2C
(Notes 4, 5)
20 +
0.1CB
300
ns
Fall Time of Both SDA and SCL
Signals Receiving
tF_I2C
(Notes 4, 5)
20 +
0.1CB
300
ns
Fall Time of SDA Transmitting
tF_TX
(Notes 4, 5)
20 +
0.1CB
250
ns
Pulse Width of Spike Suppressed
tSP
(Note 6)
50
ns
Capacitive Load for Each Bus
Line
CB
(Note 5)
400
pF



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