ICS853S024

LOW SKEW, 1-TO-24 DIFFERENTIAL-TO-3.3V, 2.5V LVPECL FANOUT BUFFER

PRELIMINARY

LOW SKEW LVPECL FANOUT BUFFER

6

ICS853S024AY REV. A APRIL 30, 2008

Parameter Measurement Information, continued

Output Duty Cycle/Pulse Width/Period

Output Rise/Fall Time

Application Information

Wiring the Differential Input to Accept Single Ended Levels

Figure 1 shows how the differential input can be wired to accept

generated by the bias resistors R1, R2 and C1. This bias circuit

should be located as close as possible to the input pin. The ratio of

R1 and R2 might need to be adjusted to position the V_REF in the

center of the input voltage swing. For example, if the input clock

R2/R1 = 0.609.

Figure 1. Single-Ended Signal Driving Differential Input

t

PW

t

PERIOD

t

PW

t

PERIOD

odc =

x 100%

nQ0:nQ21

Q0:Q21

Clock

Outputs

20%

80%

80%

20%

V_REF

Single Ended Clock Input

CLK

nCLK

R1

1K

C1

0.1u

R2

1K