Data Sheet

27

Rev. 1.1, 2007-11-08

TLE7368

Detailed Internal Circuits Description

5.5

Stand-by Regulator

The intention of the stand-by or keep alive regulator is to supply e.g. external memory even with the main

microcontroller supply being disabled. Therefore the state of the stand-by regulator is not controlled by the enable

block, but it is active all the time. The stand-by regulator starts to operate as soon as the battery voltage increases

above its operating threshold. The current consumption during single operation of the stand-by regulator is

reduced to a minimum. It can be configured for output voltages as either 1.0 V or 2.6 V through the SEL_STBY pin.

5.6

Overtemperature Protection

At junction temperatures between 160

°C and 190 °C, which can be caused by e.g. excessive power dissipation

or increased ambient temperatures, the overtemperature protection kicks in and disables the Buck converter. With

the Buck converter disabled the linear regulators will most likely not be able to keep up their output voltage and a

system reset can be expected. Due to the drop in power dissipation the junction temperature will decrease. The

built in hysteresis circuit ensures that the junction temperature cools down by a certain temperature delta before

the Buck converter is enabled again.

5.7

Device Enable Function

The device enable block controls the operation of the Buck converter as well as of the linear regulators and tracker

blocks. Two external signal inputs determine the state of those blocks, a high voltage input EN_IGN and a low

voltage input EN_uC. Internally the two signals are logic OR-ed which means that with either signal the Buck and

linear regulators can be turned on or held active, provided that the battery voltage is above its minimum operating

range. In order to turn off the regulator blocks, the signals on both inputs, EN_IGN and EN_uC must be lower than

their deactivating threshold. The stand-by regulator’s operation is not affected by the device enable block.

5.8

Reset Function

The Reset concept of the TLE7368 is chosen to support multiple microcontroller platforms. Two open drain

outputs, i.e. the Reset outputs, RO_1 and RO_2, indicate the states of the different regulators. Figure 5 gives the

details on the Reset timing. RO_1 is tied to LDO1 and will indicate whenever its output, Q_LDO1, is crossing the

under- or overvoltage threshold. The second Reset output, RO_2, turns low whenever one of the two outputs,

Q_LDO2 or FB_EXT, are crossing their under- and overvoltage thresholds. At power up in order to avoid a faulty

microcontroller start, a so called Reset delay function, i.e. the Reset release delay, is implemented. This delay until

the reset is released, counted from the time where the regulator outputs cross the threshold, is determined by a

small external delay capacitor at pin RT.

The power up reset delay time

t

0.33 nF … 4.7 nF:

t

(3)

For the tolerance calculation please refer to the parameters 4.4.77, 4.4.78 and 4.4.79. In order to find the worst

case limits of

t

The Reset generators within the TLE7368 are supplied from multiple sources, VIN_STBY, VCCP, VFB_L/IN,

VQ_LDO1 and VQ_LDO2, to fulfill next generation microcontroller requirements during power up and power down.