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ATmega16 数据表(PDF) 84 Page - ATMEL Corporation |
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ATmega16 数据表(HTML) 84 Page - ATMEL Corporation |
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84 / 357 page ![]() 84 2466S–AVR–05/09 ATmega16(L) When OC0 is connected to the pin, the function of the COM01:0 bits depends on the WGM01:0 bit setting. Table 39 shows the COM01:0 bit functionality when the WGM01:0 bits are set to a normal or CTC mode (non-PWM). Table 40 shows the COM01:0 bit functionality when the WGM01:0 bits are set to fast PWM mode. Note: 1. A special case occurs when OCR0 equals TOP and COM01 is set. In this case, the compare match is ignored, but the set or clear is done at TOP. See “Fast PWM Mode” on page 77 for more details. Table 41 shows the COM01:0 bit functionality when the WGM01:0 bits are set to phase correct PWM mode. Note: 1. A special case occurs when OCR0 equals TOP and COM01 is set. In this case, the compare match is ignored, but the set or clear is done at TOP. See “Phase Correct PWM Mode” on page 79 for more details. Table 39. Compare Output Mode, non-PWM Mode COM01 COM00 Description 0 0 Normal port operation, OC0 disconnected. 0 1 Toggle OC0 on compare match 1 0 Clear OC0 on compare match 1 1 Set OC0 on compare match Table 40. Compare Output Mode, Fast PWM Mode (1) COM01 COM00 Description 0 0 Normal port operation, OC0 disconnected. 01 Reserved 1 0 Clear OC0 on compare match, set OC0 at BOTTOM, (non-inverting mode) 1 1 Set OC0 on compare match, clear OC0 at BOTTOM, (inverting mode) Table 41. Compare Output Mode, Phase Correct PWM Mode(1) COM01 COM00 Description 0 0 Normal port operation, OC0 disconnected. 01 Reserved 1 0 Clear OC0 on compare match when up-counting. Set OC0 on compare match when downcounting. 1 1 Set OC0 on compare match when up-counting. Clear OC0 on compare match when downcounting. |
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