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R5F64166DFB 数据表(PDF) 85 Page - Renesas Technology Corp

部件名 R5F64166DFB
功能描述  RENESAS MCU
PDF  96 Pages
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制造商  RENESAS [Renesas Technology Corp]
网页  http://www.renesas.com
标志 RENESAS - Renesas Technology Corp

R5F64166DFB 数据表(HTML) 85 Page - Renesas Technology Corp

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REJ03B0253-0100 Rev.1.00 Nov 19, 2009
Page 85 of 94
R32C/116 Group
5. Electrical Characteristics
VCC =3.3 V
Timing Requirements (VCC = 3.0 to 3.6 V, VSS = 0 V, and Ta =Topr, unless otherwise noted)
Note:
1.
The value is calculated by the following formulas based on a value SSC set by bits SSC4 to SSC0 in
the I2CSSCR register:
th(SDA-SCL)S = SSC ÷ 2 × tc(φIIC) + 40 [ns]
tsu(SCL-SDA)P = (SSC ÷ 2 + 1) × tc(φIIC) + 40 [ns]
tw(SDAH)P = (SSC + 1) × tc(φIIC) + 40 [ns]
Table 5.60
Multi-master I2C-bus Interface
Symbol
Characteristic
Value
Unit
Standard-mode
Fast-mode
Min.
Max.
Min.
Max.
tw(SCLH)
MSCL input high level pulse width
600
600
ns
tw(SCLL)
MSCL input low level pulse width
600
600
ns
tr(SCL)
MSCL input rise time
1000
300
ns
tf(SCL)
MSCL input fall time
300
300
ns
tr(SDA)
MSDA input rise time
1000
300
ns
tf(SDA)
MSDA input fall time
300
300
ns
th(SDA-SCL)S
MSCL high level hold time after start
condition/restart condition
(1)
2 × tc(φIIC) + 40
ns
tsu(SCL-SDA)P
MSCL high level setup time for
restart condition/stop condition
(1)
2 × tc(φIIC) + 40
ns
tw(SDAH)P
MSDA high level pulse width after
stop condition
(1)
4 × tc(φIIC) + 40
ns
tsu(SDA-SCL)
MSDA input setup time
100
100
ns
th(SCL-SDA)
MSDA input hold time
00
ns



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