25

TPR0441BX–SMS–09/09

ATVaultIC460

Definitions and abbreviations

3DES / TDES

Triple DES algorithm

AES

Advanced Encryption Standard algorithm as defined in FIPS PUB 197

APDU

Application Protocol Data Unit as defined in ISO7816-3

Authentication

An identification or entity authentication technique assures one party (the verifier), through acquisi-

tion of corroborative evidence, of both the identity of a second party involved, and that the second

(the claimant) was active at the time the evidence was created or acquired. (From Handbook of

Applied Cryptography)

ASSP

Application Specific Standard Product

CBC

Cipher Block Chaining method applied to block ciphers

CFB

Cipher Feedback Register chaining method applied to block ciphers

CCID

Circuit(s) Cards Interface Devices

CMAC

Cipher-based Message Authentication Code

CPU

Central Processing Unit

Cryptographic key

A bit string used as a secret parameter by a cryptographic algorithm. To prevent a key from being

guessed, keys need to be generated truly randomly and contain sufficient entropy.

DES

Data Encryption Standard algorithm as defined in FIPS PUB 46-3

Device

Any CPU with master or slave capability

DSA

Digital Signature Algorithm as defined in FIPS PUB 186-2

ECB

Electronic Code Book chaining method applied to block ciphers

ECDSA

Elliptic Curves DSA as defined in FIPS PUB 186-2

EEPROM

Electrically Erasable Programmable Read-Only Memory

FAT

FIPS

Federal Information Processing Standards

FIPS-approved

An algorithm or technique that is specified or adopted in FIPS

HMAC

Hash-based Message Authentication Code as defined in FIPS PUB 198

Host

Entity that communicates (directly or not) with the device.

HOTP

HMAC-based One Time Password algorithm as defined in RFC 4226

ISO7816

Smart Card interface

MAC

Message Authentication Code - A bit string of fixed length, computed by a MAC generation algo-

rithm, that is used to establish the authenticity and, hence, the integrity of a message.

Master

The device that initiates and terminates a transmission. The Master also generates the clock for syn-

chronous interface.

NIST

National Institute of Standards and Technology

NVM

Non Volatile Memory (EEPROM, flash, …)