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BQ20Z60DBT-R1 数据表(PDF) 6 Page - Texas Instruments |
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BQ20Z60DBT-R1 数据表(HTML) 6 Page - Texas Instruments |
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6 / 15 page ![]() bq20z60-R1 SLUS991 – DECEMBER 2009 www.ti.com OSCILLATOR (continued) VCC = 2.4 V to 2.6 V, TA = –40°C to 85°C (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT t(SXO) Start-up time(3) 2.5 5 ms LOW FREQUENCY OSCILLATOR f(LOSC) Operating frequency 32.768 kHz –2.5 0.25 2.5 f(LEIO) Frequency error(2) (4) % TA = 20°C to 70°C –1.5 0.25 1.5 t(LSXO) Start-up time (5) 500 μs (3) The start-up time is defined as the time it takes for the oscillator output frequency to be within 1 % of the specified frequency. (4) The frequency error is measured from 32.768 kHz. (5) The start-up time is defined as the time it takes for the oscillator output frequency to be ± 3%. DATA FLASH MEMORY CHARACTERISTICS VCC = 2.4 V to 2.6 V, TA = –40°C to 85°C (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT tDR Data retention See (1) 10 Years Flash programming write-cycles See (1) 20,000 Cycles t(WORDPROG) Word programming time See (1) 2 ms I(DDdPROG) Flash-write supply current See (1) 5 10 mA (1) Specified by design. Not production tested. REGISTER BACKUP VCC = 2.4 V to 2.6 V, TA = –40°C to 85°C (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT I(RB) RB data-retention input current V(RB) > V(RBMIN), VCC < VIT- 1500 nA V(RB) > V(RBMIN), VCC < VIT-, 40 160 TA = 0°C to 50°C V(RB) RB data-retention voltage(1) 1.7 V (1) Specified by design. Not production tested. SMBus TIMING SPECIFICATIONS VCC = 2.4 V to 2.6 V, TA = –40°C to 85°C (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT fSMB SMBus operating frequency Slave mode, SMBC 50% duty cycle 10 100 kHz fMAS SMBus master clock frequency Master mode, no clock low slave 51.2 extend tBUF Bus free time between start and stop 4.7 tHD:STA Hold time after (repeated) start 4 μs tSU:STA Repeated start setup time 4.7 tSU:STO Stop setup time 4 Receive mode 0 tHD:DAT Data hold time Transmit mode 300 ns tSU:DAT Data setup time 250 tTIMEOUT Error signal/detect See (1) 25 35 ms tLOW Clock low period 4.7 μs tHIGH Clock high period See (2) 4 50 (1) The bq20z60-R1 times out when any clock low exceeds tTIMEOUT. (2) tHIGH:MAX. is minimum bus idle time. SMBC = 1 for t > 50 μs causes reset of any transaction involving the bq20z60-R1 that is in progress. 6 Submit Documentation Feedback Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s) :bq20z60-R1 |
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