ADE5166_09 datasheet(19/156 Pages) AD

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ADE5166/ADE5169/ADE5566/ADE5569

Rev. B | Page 19 of 156

Pin No.

Mnemonic

Description

P0.2/CF1

General-Purpose Digital I/O Port 0.2/Calibration Frequency Logic Output 1. The CF1 logic output gives

instantaneous active, reactive, or apparent power or Irms information.

SDEN/P2.3/TxD2

Serial Download Mode Enable/General-Purpose Digital Output Port 2.3/Transmitter Data Output 2

(Asynchronous). This pin is used to enable serial download mode through a resistor when pulled low on

power-up or reset. On reset, this pin momentarily becomes an input, and the status of the pin is sampled.

If there is no pull-down resistor in place, the pin momentarily goes high, and then user code is executed.

If the pin is pulled down on reset, the embedded serial download/debug kernel executes, and this pin

remains low during the internal program execution. After reset, this pin can be used as a digital output port

pin (P2.3) or as Transmitter Data Output 2 (asynchronous).

BCTRL/INT1/P0.0

Digital Input for Battery Control/External Interrupt Input 1/General-Purpose Digital I/O Port 0.0. This logic

input connects VDD or VBAT to VSWOUT internally when set to logic high or logic low, respectively. When left

open, the connection between VDD or VBAT and VSWOUT is selected internally.

XTAL2

A crystal can be connected across this pin and XTAL1 (see the XTAL1 pin description) to provide a clock

source. The XTAL2 pin can drive one CMOS load when an external clock is supplied at XTAL1 or by the gate

oscillator circuit. An internal 6 pF capacitor is connected to this pin.

XTAL1

An external clock can be provided at this logic input. Alternatively, a tuning fork crystal can be connected

across XTAL1 and XTAL2 to provide a clock source. The clock frequency for specified operation is 32.768 kHz.

An internal 6 pF capacitor is connected to this pin.

INT0

External Interrupt Input 0.

49, 50

VP, VN

Analog Inputs for Voltage Channel. These inputs are fully differential voltage inputs with a maximum

differential level of ±500 mV for specified operation. This channel also has an internal PGA.

Input for Emulation. When held high, this input enables the device to fetch code from internal program

memory locations. The ADE5566/ADE5569 do not support external code memory. This pin should not be left

floating.

52, 53

IP, IN

Analog Inputs for Current Channel. These inputs are fully differential voltage inputs with a maximum

differential level of ±500 mV for specified operation. This channel also has an internal PGA.

AGND

Ground Reference for Analog Circuitry.

FP26

LCD Segment Output 26.

RESET

Reset Input, Active Low.

REFIN/OUT

Access to On-Chip Voltage Reference. The on-chip reference has a nominal value of 1.2 V ± 0.1% and a typical

temperature coefficient of 50 ppm/°C maximum. This pin should be decoupled with a 1 μF capacitor in

parallel with a ceramic 100 nF capacitor.

VBAT

Power Supply Input from the Battery with a 2.4 V to 3.7 V Range. This pin is connected internally to VDD when

the battery is selected as the power supply.

VINTA

Access to On-Chip 2.5 V Analog LDO. No external active circuitry should be connected to this pin. This pin

should be decoupled with a 10 μF capacitor in parallel with a ceramic 100 nF capacitor.

VDD

3.3 V Power Supply Input from the Regulator. This pin is connected internally to VSWOUT when the regulator is

selected as the power supply. This pin should be decoupled with a 10 μF capacitor in parallel with a ceramic

100 nF capacitor.

VSWOUT

3.3 V Power Supply Output. This pin provides the supply voltage for the LDOs and the internal circuitry. This

pin should be decoupled with a 10 μF capacitor in parallel with a ceramic 100 nF capacitor.

VINTD

Access to On-Chip 2.5 V Digital LDO. No external active circuitry should be connected to this pin. This pin

should be decoupled with a 10 μF capacitor in parallel with a ceramic 100 nF capacitor.

DGND

Ground Reference for Digital Circuitry.

VDCIN

Analog Input for DC Voltage Monitoring. The maximum input voltage on this pin is VSWOUT with respect to

AGND. This pin is used to monitor the preregulated dc voltage.

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