ADM488A/ADM489A

Rev. 0 | Page 7 of 16

NC

1

RO

2

RE

3

DE

4

14

NC

13

A

12

B

11

DI

5

GND

6

GND

7

Z

10

Y

9

NC

8

NC = NO CONNECT

ADM489A

TOP VIEW

(Not to Scale)

Figure 4. ADM489A SOIC_N Pin Configuration

1

2

3

4

5

10

9

8

7

6

RE

DE

DI

GND

RO

A

B

Z

Y

ADM489A

TOP VIEW

(Not to Scale)

Figure 5. ADM489A MSOP Pin Configuration

Table 5. ADM489A Pin Function Descriptions

Pin No.

Mnemonic

Description

SOIC_N

MSOP

1, 8, 13

N/A1

NC

No Connect. No connections are required to this pin.

2

1

RO

Receiver Output. When enabled, if A > B by 200 mV, RO = high. If A < B by 200 mV, RO = low.

3

2

RE

Receiver Output Enable. A low level enables the receiver output, RO. A high level places the

ADM489A in a high impedance state.

4

3

DE

Driver Output Enable. A high level enables the driver differential outputs (Y and Z). A low level

places the ADM489A in a high impedance state.

5

4

DI

Driver Input. When the driver is enabled, a logic low on DI forces Y low and Z high, whereas a

logic high on DI forces Y high and Z low.

6, 7

5

GND

Ground Connection, 0 V.

9

6

Y

Noninverting Driver, Differential Output Y.

10

7

Z

Inverting Driver, Differential Output Z.

11

8

B

Inverting Receiver, Input B.

12

9

A

Noninverting Receiver, Input A.

14

10

Power Supply, 5 V ± 10%.