Flexible Port Configurations

The PEX 8618 supports a large number of port configurations

as shown in figure 1 below. Please refer to the PEX 8618

datasheet for more port configuration options.

Figure 1. Port Configurations

Hot-Plug for High Availability

Hot-Plug capability allows users to replace hardware modules

and perform maintenance without powering down the system.

The PEX 8618 Hot-Plug capability feature makes it suitable

for High Availability (HA) applications. If the PEX 8618 is

used in an application where one or more of its downstream

ports connect to PCI Express slots, each port’s Hot-Plug

Controller can be used to manage the hot-plug Hot-Plug event

of its associated slot. Every port on the PEX 8618 is equipped

with a Hot-Plug control/status register to support Hot-Plug

capability through external logic via the I

Dual Cast

The PEX 8618 supports Dual Cast, a feature which allows for

the copying of data (e.g. packets) from one ingress port to two

egress ports allowing for higher performance in storage,

security, and mirroring applications.

Read Pacing

The Read Pacing feature allows users to throttle the amount of

read requests being made by downstream devices. In the case

where a downstream device requests several long reads back-

to-back, the Root Complex gets tied up in serving this

downstream port. If this port has a narrow link and is therefore

slow in receiving these read packets from the Root Complex,

then other downstream ports may become starved – thus,

impacting performance. The Read Pacing feature enhances

performances by allowing for the adequate servicing of all

downstream devices by intelligent handling of read requests.

SerDes Power and Signal Management

The PEX 8618 provides low power capability that is fully

compliant with the PCI Express power management

specification. In addition, the SerDes physical links can be

turned off when unused for even lower power. The PEX 8618

supports software control of the SerDes outputs to allow

optimization of power and signal strength in a system. The

PLX SerDes implementation supports four levels of power –

off, low, typical, and high. The SerDes block also supports

loop-back modes and advanced reporting of error

conditions, which enables efficient debug and management of

the entire system.

PEX 8618

PEX 8618

x4

x1

x1

x1

x1x1x1x1x1x1

PEX 8618

PEX 8618

x4

x4

x4

x1

x1

x1

PEX 8618

PEX 8618

x1

15 x1 Ports

PEX 8618

PEX 8618

x8

x1

x1

x1x1x1x1

PEX 8618

PEX 8618

x8

x4

x4

x1

x1

x4

PEX 8618

PEX 8618

x4

x1

x1

x1

x1x1x1x1x1

x4

PEX 8618

PEX 8618

PEX 8618

PEX 8618

x4

x1

x1

x1

x1x1x1x1x1x1

PEX 8618

PEX 8618

PEX 8618

PEX 8618

x4

x4

x4

x1

x1

x1

PEX 8618

PEX 8618

PEX 8618

PEX 8618

x1

15 x1 Ports

PEX 8618

PEX 8618

PEX 8618

PEX 8618

x8

x1

x1

x1x1x1x1

PEX 8618

PEX 8618

PEX 8618

PEX 8618

x8

x4

x4

x1

x1

x4

PEX 8618

PEX 8618

PEX 8618

PEX 8618

x4

x1

x1

x1

x1x1x1x1x1

x4

Port and Virtual Channel (VC) Arbitration

The PEX 8618 switch supports hardware fixed and Weighted

Round-Robin Ingress Port Arbitration. This allows fine tuning

of Quality of Service and efficient use of packet buffers for

better system performance. The PEX 8618 also supports WRR

VC arbitration scheme between the two virtual channels.

Applications

Suitable for fan-out, control plane applications, embedded

systems as well as intelligent I/O applications, PEX 8618

can be configured for a wide variety of form factors and

applications.

Fan-Out

The PEX 8618 switch, with its high port count and flexible

configurations, allows user specific tuning to a variety of host-

centric as well as peer-to-peer applications.

Control

Processor

Control

Processor

Memory

Memory

PEX 8618

PEX 8618

x1

x1

PEX 8112

PEX 8112

PEX 8311

PEX 8311

PEX 8112

PEX 8112

PCIe

PCIe

PCIe

PCIe

PCIe

PCIe

PCIe

PCIe

PCIe

PCIe

PCIe

PCIe

PCIe

PCIe

PCI

PCI

PCI

PCI

FPGA

FPGA

. . .

Control

Processor

Control

Processor

Memory

Memory

PEX 8618

PEX 8618

PEX 8618

PEX 8618

x1

x1

PEX 8112

PEX 8112

PEX 8112

PEX 8112

PEX 8311

PEX 8311

PEX 8311

PEX 8311

PEX 8112

PEX 8112

PEX 8112

PEX 8112

PCIe

PCIe

PCIe

PCIe

PCIe

PCIe

PCIe

PCIe

PCIe

PCIe

PCIe

PCIe

PCIe

PCIe

PCI

PCI

PCI

PCI

FPGA

FPGA

. . .

Figure 2. Fan-in/out Usage

Figure 2 shows a typical fan-out design, where the processor

provides a PCI Express link that needs to be fanned into a

larger number of smaller ports for a variety of I/O functions,

each with different bandwidth requirements.

In this example, the PEX 8618 would typically have a 1-lane

upstream port, and as many as 15 downstream ports. The

downstream ports provide x1 PCI Express connectivity to the

endpoints. With its sixteen ports, the PEX 8618 can provide

fan-out connectivity to up to fifteen PCI Express devices. The

figure also shows how some of the ports can be bridged to

provide PCI slots or Generic devices through the use of the

PEX 8311 and PEX 8112 PCIe bridging devices.

Control Plane Application

The PEX 8618 is ideal for control planes in routers and other

communications sub-systems to meet increased packet

processing needs without compromising latency. Figure 3