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33982C 数据表(PDF) 21 Page - Freescale Semiconductor, Inc

部件名 33982C
功能描述  Single Intelligent High-current Self-protected Silicon High Side Switch (2.0 m廓)
PDF  36 Pages
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制造商  FREESCALE [Freescale Semiconductor, Inc]
网页  http://www.freescale.com
标志 FREESCALE - Freescale Semiconductor, Inc

33982C 数据表(HTML) 21 Page - Freescale Semiconductor, Inc

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Analog Integrated Circuit Device Data
Freescale Semiconductor
21
33982
FUNCTIONAL DEVICE OPERATION
PROTECTION AND DIAGNOSIS FEATURES
REVERSE BATTERY
The output survives the application of reverse voltage as
low as -16 V. Under these conditions, the output’s gate is
enhanced to keep the junction temperature less than 150°C.
The ON resistance of the output is fairly similar to that in the
Normal mode. No additional passive components are
required.
GROUND DISCONNECT PROTECTION
In the event the 33982 ground is disconnected from load
ground, the device protects itself and safely turns OFF the
output regardless the state of the output at the time of
disconnection. A 10 k
Ω resistor needs to be added between
the WAKE pin and the rest of the circuitry in order to ensure
that the device turns off in case of ground disconnect and to
prevent this pin to exceed its maximum ratings.
Table 8. Device Behavior in Case of Under-voltage
High Side
Switch
(VPWR Battery
Voltage)
∗∗
State
UV Enable
IN = 0
(Falling VPWR)
UV Enable
IN = 0
(Rising VPWR)
UV Enable
IN
∗∗∗ = 1
(Falling VPWR)
UV Enable
IN
∗∗∗ = 1
(Rising VPWR)
UV Disable
IN = 0
(Falling or
Rising VPWR)
UV Disable
IN
∗∗∗ = 1
(Falling or
Rising VPWR)
VPWR >
VPWRUV
Output State
OFF
OFF
ON
OFF
OFF
ON
FS State
1
1
1
0
1
1
SPI Fault
Register UVF
Bit
0
1 until next read
0
1
0
0
VPWRUV >
VPWR >
UVPOR
Output State
OFF
OFF
OFF
OFF
OFF
ON
FS State
0
0
0
0
1
1
SPI Fault
Register UVF
Bit
1
1
1
1
0
0
UVPOR >
VPWR > 2.5 V
∗
Output State
OFF
OFF
OFF
OFF
OFF
ON
FS State
1
1
1
1
1
1
SPI Fault
Register UVF
Bit
1 until next read
1
1 until next read 1 until next read
0
0
2.5 V > VPWR >
0 V
Output State
OFF
OFF
OFF
OFF
OFF
OFF
FS State
1
1
1
1
1
1
SPI Fault
Register UVF
Bit
1 until next read 1 until next read 1 until next read 1 until next read
0
0
Comments
UV fault is
not latched
UV fault is
not latched
UV fault
is latched
∗ Typical value; not guaranteed
∗∗ While VDD remains within specified range.
∗∗∗ = IN is equivalent to IN direct input or IN_spi SPI input.



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