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HT66F30 数据表(PDF) 77 Page - Holtek Semiconductor Inc |
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HT66F30 数据表(HTML) 77 Page - Holtek Semiconductor Inc |
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77 / 224 page ![]() HT66F20/HT66F30/HT66F40/HT66F50/HT66F60 Rev. 1.00 77 November 3, 2009 TM Operation The three different types of TM offer a diverse range of functions, from simple timing operations to PWM signal generation. The key to understanding how the TM oper- ates is to see it in terms of a free running counter whose value is then compared with the value of pre-programmed internal comparators. When the free running counter has the same value as the pre-programmed comparator, known as a compare match situation, a TM interrupt signal will be generated which can clear the counter and perhaps also change the condition of the TM output pin. The internal TM counter is driven by a user selectable clock source, which can be an internal clock or an external pin. TM Clock Source The clock source which drives the main counter in each TM can originate from various sources. The selection of the required clock source is implemented using the TnCK2~TnCK0 bits in the TM control registers. The clock source can be a ratio of either the system clock fSYS or the internal high clock fH, the fTBC clock source or the external TCKn pin. Note that setting these bits to the value 101 will select a reserved clock input, in effect dis- connecting the TM clock source. The TCKn pin clock source is used to allow an external signal to drive the TM as an external clock source or for event counting. TM Interrupts The Compact and Standard type TMs each have two in- ternal interrupts, one for each of the internal comparator A or comparator P, which generate a TM interrupt when a compare match condition occurs. As the Enhanced type TM has three internal comparators and comparator A or comparator B or comparator P compare match functions, it consequently has three internal interrupts. When a TM interrupt is generated it can be used to clear the counter and also to change the state of the TM out- put pin. TM External Pins Each of the TMs, irrespective of what type, has one TM input pin, with the label TCKn. The TM input pin, is es- sentially a clock source for the TM and is selected using the TnCK2~TnCK0 bits in the TMnC0 register. This ex- ternal TM input pin allows an external clock source to drive the internal TM. This external TM input pin is shared with other functions but will be connected to the internal TM if selected using the TnCK2~TnCK0 bits. The TM input pin can be chosen to have either a rising or falling active edge. The TMs each have one or more output pins with the la- bel TPn. When the TM is in the Compare Match Output Mode, these pins can be controlled by the TM to switch to a high or low level or to toggle when a compare match situation occurs. The external TPn output pin is also the pin where the TM generates the PWM output waveform. As the TM output pins are pin-shared with other func- tion, the TM output function must first be setup using registers. A single bit in one of the registers determines if its associated pin is to be used as an external TM output pin or if it is to have another function. The number of out- put pins for each TM type and device is different, the de- tails are provided in the accompanying table. Device CTM STM ETM Registers HT66F20 TP0_0 TP1_0, TP1_1 ¾ TMPC0 HT66F30 TP0_0, TP0_1 ¾ TP1A, TP1B_0, TP1B_1 TMPC0 HT66F40 TP0_0, TP0_1 TP2_0, TP2_1 TP1A, TP1B_0, TP1B_1, TP1B_2 TMPC0, TMPC1 HT66F50 TP0_0, TP0_1 TP3_0, TP3_1 TP2_0, TP2_1 TP1A, TP1B_0, TP1B_1, TP1B_2 TMPC0, TMPC1 HT66F60 TP0_0, TP0_1 TP3_0, TP3_1 TP2_0, TP2_1 TP1A, TP1B_0, TP1B_1, TP1B_2 TMPC0, TMPC1 TM Output Pins |
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