HT82K74E datasheet(9/56 Pages) HOLTEK

9 / 56 page

HT82K74E/HT82K74EE

Rev. 1.00

December 15, 2009

· Logic operations: AND, OR, XOR, ANDM, ORM,

XORM, CPL, CPLA

· Rotation RRA, RR, RRCA, RRC, RLA, RL, RLCA,

RLC

· Increment and Decrement INCA, INC, DECA, DEC

· Branch decision, JMP, SZ, SZA, SNZ, SIZ, SDZ,

SIZA, SDZA, CALL, RET, RETI

Program Memory

The Program Memory is the location where the user

code or program is stored. The device is supplied with

One-Time Programmable, OTP, memory where users

can program their application code into the device. By

using the appropriate programming tools, OTP devices

offer users the flexibility to freely develop their applica-

tions which may be useful during debug or for products

requiring frequent upgrades or program changes. OTP

devices are also applicable for use in applications that

require low or medium volume production runs.

Structure

The Program Memory has a capacity of 2K

´15 bits. The

Program Memory is addressed by the Program Counter

and also contains data, table information and interrupt

entries. Table data, which can be setup in any location

within the Program Memory, is addressed by separate

table pointer registers.

Special Vectors

Within the Program Memory, certain locations are re-

served for special usage such as reset and interrupts.

· Location 000H

This vector is reserved for use by the device reset for

program initialisation. After a device reset is initiated,

the program will jump to this location and begin execu-

tion.

· Location 008H

This vector is used by the timer/event counter. If a

counter overflow occurs, the program will jump to this

location and begin execution if the timer interrupt is

enabled and the stack is not full.

· Table location

Any location in the program memory can be used as

look-up tables. There are three methods to read the

ROM data by two table read instructions:

²TABRDC²

and

²TABRDL², transfer the contents of the

lower-order byte to the specified data memory, and

the higher-order byte to TBLH (08H).

¨ The three methods are shown as follows: The in-

structions

²TABRDC [m]² (the current page, one

page=256words), where the table locations is de-

fined by TBLP (07H) in the current page. And the

TBHP function selected via a configuration option is

disabled (default).

¨ The instruction

²TABRDC [m]², where the table lo-

cation is defined by registers TBLP (07H) and

TBHP (01FH). And the TBHP function selected via

a configuration option is enabled.

¨ The instructions

²TABRDL [m]², where the table lo-

cations is defined by Registers TBLP (07H) in the

last page (700H~7FFH).

Only the destination of the lower-order byte in the ta-

ble is well-defined, the other bits of the table word are

transferred to the lower portion of TBLH, and the re-

maining 1-bit words are read as 0. The Table

Higher-order byte register (TBLH) is read only. The ta-

ble pointer (TBLP, TBHP) is a read/write register (07H,

1FH), which indicates the table location. Before ac-

cessing the table, the location must be placed in the

TBLP and TBHP (If the TBHP function selected via a

configuration option is disabled, the value in TBHP

has no effect). The TBLH is read only and cannot be

restored. If the main routine and the ISR (Interrupt

Service Routine) both employ the table read instruc-

tion, the contents of the TBLH in the

main routine are likely to be changed by the table read

instruction used in the ISR. Errors can occur. In other

words, using the table read instruction in the main rou-

tine and the ISR simultaneously should be avoided.

However, if the table read instruction has to be applied

in both the main routine and the ISR, the interrupt

should be disabled prior to the table read instruction. It

will not be enabled until the TBLH has been backed

up. All table related instructions require two cycles to

complete the operation. These areas may function as

normal program memory depending on the require-

ments.

Once TBHP is enabled, the instruction

²TABRDC [m]²

reads the ROM data as defined by TBLP and TBHP

value. Otherwise, the TBHP function selected via a

configuration option is disabled, the instruction

²TABRDC [m]² reads the ROM data as defined by

TBLP and the current program counter bits.

0 0 0 H

1 5 b i t s

n F F H

P r o g r a m

M e m o r y

D e v i c e I n i t i a l i z a t i o n P r o g r a m

T i m e r / E v e n t C o u n t e r I n t e r r u p t S u b r o u t i n e

L o o k - u p T a b l e ( 2 5 6 w o r d s )

7 F F H

0 0 4 H

0 0 8 H

n 0 0 H

N o t I m p l e m e n t e d

Program Memory Structure

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