Pad Assignment

Chip size: 95

´ 99 (mil)

2

Bump height: 18

mm ± 3mm

Min. Bump spacing: 23.102

mm

Bump size: 76

´ 76mm

2

* The IC substrate should be connected to VDD in the PCB layout artwork.

HT16220

Rev. 1.90

3

October 12, 2009

PATENTED

D A T A

V S S

V D D

V L C D

B Z

O S C O

O S C I

T 1

T 2

T 3

S E G 1 9

S E G 1 8

S E G 1 7

S E G 1 6

S E G 1 5

S E G 1 4

S E G 1 3

S E G 1 2

S E G 1 1

S E G 1 0

S E G 9

S E G 8

S E G 7

C S

R D

W R

I R Q

B Z

4 3

3 1

3 2

3 3

3 4

3 5

3 6

3 7

3 8

3 9

4 0

4 1

4 2

2 9 3 0

1 6 1 7

1 8 1 9

2 1

2 2 2 3 2 4 2 5 2 6

2 7 2 8

2 0

1

2

3

4

5

6

7

8

9

1 0

1 1

1 2

1 3

1 4

1 5

4 4

4 5

4 6

4 7

4 8

4 9

5 0

5 1

5 2

5 3

5 4

5 5

( 0 , 0 )