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Revision 1.34

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AS1105

Data Sheet - P i n A s s i g n m e n t s

4 Pin Assignments

Figure 2. Pin Configuration (Top View)

Pin Descriptions

Table 1. Pin Descriptions

Pin

Name

Pin Number

Description

DOUT

1

Serial data output for cascading drivers. The output is valid after 16.5

clock cycles. The output is never set to high impedance.

DIN

2

Data input. Data is programmed into the 16-bit shift register on the rising

CLK edge.

DIG0–DIG3

3,8,5,6

4-digit driver lines that sink the current from the common cathode of the

GND

4,7

Both GND pins must be connected.

LOAD

9

Strobe input. With the rising edge of the LOAD signal the 16-bit of serial

data is latched into the register.

CLK

10

Clock input. The interface is capable to support clock frequencies up to

10MHz. The serial data is clocked into the internal shift register with the

rising edge of the CLK signal. On the DOUT pin the data is applied with the

falling edge of CLK.

SEG A–G, DP

11–14, 17–20

Seven segment driver lines including the decimal point. When a

segment is turned off the output is connected to GND.

ISET

15

therefore the brightness.

16

Positive Supply Voltage (+5V)

AS1105

10

1

2

11

3

4

5

6

7

8

9

20

19

18

17

16

15

14

13

12

DOUT

DIN

DIG0

GND

DIG2

DIG3

GND

DIG1

LOAD

CLK

SEG D

SEG DP

SEG E

SEG C

SEG G

SEG B

SEG F

SEG A

SO