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AS1106PL 数据表(PDF) 5 Page - ams AG |
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AS1106PL 数据表(HTML) 5 Page - ams AG |
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5 / 20 page  www.austriamicrosystems.com Revision 2.24 5 - 20 AS1106, AS1107 Data Sheet - El ectrical Characte ristics Note: See Figure 12 on page 8 for more information. Table 5. Timing Characteristics Parameter Symbol Conditions Min Typ Max Unit CLK Clock Period tCP 100 ns CLK Pulse Width High tCH 50 ns CLK Pulse Width Low tCL 50 ns CSM Fall to CLK Rise Setup Time (AS1107 or AS1106 SPI-programmed) tCSS 25 ns CLK Rise to LOAD/CSN Rise Hold Time tCSH 0ns DIN Setup Time tDS 25 ns DIN Hold Time tDH 0ns Output Data Propagation Delay tDO CLOAD = 50pF 25 ns LOAD Rising Edge to Next Clock Rising Edge (AS1106 only) tLDCK 50 ns Minimum LOAD/CSN Pulse High tCSW 50 ns Data-to-Segment Delay tDSPD 2.25 ms |
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