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AS1109 数据表(PDF) 21 Page - ams AG |
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AS1109 数据表(HTML) 21 Page - ams AG |
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21 / 26 page ![]() www.austriamicrosystems.com Revision 1.18 21 - 26 AS1109 Data Sheet - P a c k age Drawin gs an d Ma rkings 10 Package Drawings and Markings The device is available in an 16-pin SOIC-150 package. Figure 25. 16-pin SOIC-150 Package Notes: 1. Lead coplanarity should be 0 to 0.10mm (.004”) max. 2. Package surfacing: a. Top: matte (charmilles #18- 30). b. All sides: matte (charmilles #18- 30). c. Bottom: smooth or matte (charmilles #18- 30). 3. All dimensions excluding mold flashes and end flash from the package body shall not exceed 0.25mm (.010”) per side (D). 4. Detail of pin #1 identifier are optional but must be located within the zone indicated. 5. Dimensions are in millimeters. Symbol Min Max A1 0.10 0.25 B 0.36 0.46 C 0.19 0.25 D 9.80 9.98 E 3.81 3.99 e 1.27 BSC H 5.80 6.20 h 0.25 0.50 L 0.41 1.27 A 1.52 1.72 α 0º 8º ZD 0.51 REF A2 1.37 1.57 |
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