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AS1374 数据表(PDF) 9 Page - ams AG

部件名 AS1374
功能描述  200mA, Ultra-Low-Noise, High-PSRR, Dual Low Dropout Regulators
PDF  14 Pages
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制造商  AMSCO [ams AG]
网页  http://www.ams.com
标志 AMSCO - ams AG

AS1374 数据表(HTML) 9 Page - ams AG

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AS1374
Datasheet - D e t a i l e d D e s c r i p t i o n
8 Detailed Description
The AS1374 is an ultra-low-noise, low-dropout, low-quiescent current linear-regulator with two seperated outputs spe-
cifically designed for space-limited applications. These device can supply loads up to 200mA. As shown in Figure 25,
the AS1374 consist of an integrated bandgap core, error amplifier, P-channel MOSFET pass transistor, and internal
feedback voltage-divider.
The output voltage is fed back through an internal resistor voltage-divider connected to pin OUT. Additional blocks
include a current limiter, thermal sensor, and enable logic.
Internal Voltage Reference
The bandgap reference is connected to the error amplifier’s inverting input. The error amplifier compares this reference
with the feedback voltage and amplifies the difference. If the feedback voltage is lower than the reference voltage, the
pass-transistor gate is pulled low. This allows more current to pass to the output and increases the output voltage. If
the feedback voltage is too high, the pass transistor gate is pulled high, allowing less current to pass to the output.
Internal P-Channel Pass Transistor
The AS1374 feature a 0.6
Ω (typ) P-channel MOSFET pass transistor, which provides several advantages over similar
designs using a PNP pass transistor, including prolonged battery life. The P-channel MOSFET does not require a base
driver, thus quiescent current is dramatically reduced. The AS1374 do not exhibit problems associated with typical
PNP-based LDOs, and consume only 30µA of quiescent current in light load and 50µA in dropout (see Typical Operat-
ing Characteristics on page 5).
Output Voltage
The AS1374 deliver preset output voltages from 1.2V to 3.6V, in 50mV increments (see Ordering Information on page
13).
Enable
The AS1374 feature an actice high enable mode to shutdown each output indepentend. Driving EN 1 low disables Out-
put 1, driving EN 2 low disables Output 2. The disabled Output enters a high-impedance state.
Figure 25. AS1374 - Block Diagram
EN 1
GND
OUT 1
AS1374
-
+
OUT 2
-
+
Overcurrent
Protection CH2
Overcurrent
Protection CH1
Trimmable
Reference
Bandgap
Common
Logic
Enable Logic
CH2
Enable Logic
CH1
Thermal
Protection
EN 2
VDD



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