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TS8GDOM40V 数据表(PDF) 38 Page - Transcend Information. Inc. |
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TS8GDOM40V 数据表(HTML) 38 Page - Transcend Information. Inc. |
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38 / 52 page ![]() T T Tr rra a an n ns s sc c ce e en n nd d d 4 4 40 0 0---P P Piiin n n IIID D DE E E F F Fllla a as s sh h h M M Mo o od d du u ullle e e 1 1 12 2 28 8 8M M MB B B ~ ~ ~ 8 8 8G G GB B B Transcend Information Inc. Ver 1.7 38 Sustaining an Ultra DMA Data-In Burst An Ultra DMA Data-In burst is sustained by following the steps lettered below. The timing diagram is shown in below: Sustained Ultra DMA Data-In Burst Timing. The timing parameters are specified in Page 12: Ultra DMA Data Burst Timing Requirements and are described in Page 13: Ultra DMA Data Burst Timing Descriptions. The following steps shall occur in the order they are listed unless otherwise specifically allowed: a) The device shall drive a data word onto D[15:00]. b) The device shall generate a DSTROBE edge to latch the new word no sooner than tDVS after changing the state of D[15:00]. The device shall generate a DSTROBE edge no more frequently than tCYC for the selected Ultra DMA mode. The device shall not generate two rising or two falling DSTROBE edges more frequently than 2tcyc for the selected Ultra DMA mode. c) The device shall not change the state of D[15:00] until at least tDVH after generating a DSTROBE edge to latch the data. d) The device shall repeat steps (a), (b), and (c) until the data transfer is complete or an Ultra DMA data burst is paused, whichever occurs first. Notes: D[15:00] and DSTROBE signals are shown at both the host and the device to emphasize that cable settling time as well as cable propagation delay shall not allow the data signals to be considered stable at the host until some time after they are driven by the device. |
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