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PCF8533 数据表(PDF) 21 Page - NXP Semiconductors |
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PCF8533 数据表(HTML) 21 Page - NXP Semiconductors |
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21 / 45 page ![]() PCF8533_4 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 04 — 5 March 2010 21 of 45 NXP Semiconductors PCF8533 Universal LCD driver for low multiplex rates After acknowledgement, the control byte is sent defining if the next byte is a RAM or command information. The control byte also defines if the next byte is a control byte or further RAM or command data (see Figure 16 and Table 8). In this way it is possible to configure the device and then fill the display RAM with little overhead. The command bytes and control bytes are also acknowledged by all addressed PCF8533s connected to the bus. The display bytes are stored in the display RAM at the address specified by the data pointer and the subaddress counter; see Section 7.11 and Section 7.12. Fig 15. I2C-bus protocol EXAMPLES a) transmit two bytes of RAM data mgl752 S A 0 S 0 1 110 0 0 control byte slave address RAM/command byte RAM DATA M S B L S B A A P R/W = 0 S A 0 S 0 1 110 0 0 1 0 A A A P RAM DATA A b) transmit two command bytes COMMAND S A 0 S 0 1 110 0 1 0 0 A A A P COMMAND A A c) transmit one command byte and two RAM date bytes COMMAND S A 0 S 0 1 110 0 1 0 00 01 0 A A A P RAM DATA A RAM DATA A A C O R S Fig 16. Control byte format Table 8. Control byte description Bit Symbol Value Description 7CO continue bit 0 last control byte 1 control bytes continue 6 RS register selection 0 command register 1 data register 5 to 0 - not relevant mgl753 not relevant CO 7 6 5 4 3 210 RS MSB LSB |
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