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PCF8533U/2DA/2 数据表(PDF) 33 Page - NXP Semiconductors

部件名 PCF8533U/2DA/2
功能描述  Universal LCD driver for low multiplex rates
PDF  45 Pages
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制造商  NXP [NXP Semiconductors]
网页  http://www.nxp.com
标志 NXP - NXP Semiconductors

PCF8533U/2DA/2 数据表(HTML) 33 Page - NXP Semiconductors

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PCF8533_4
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 04 — 5 March 2010
33 of 45
NXP Semiconductors
PCF8533
Universal LCD driver for low multiplex rates
The contact resistance between the SYNC pins of cascaded devices must be controlled. If
the resistance is too high then the device will not be able to synchronize properly. This is
particularly applicable to COG applications. Table 19 shows the limiting values for contact
resistance.
Fig 23. Synchronization of the cascade for the various PCF8533 drive modes
Table 19.
SYNC contact resistance
Number of devices
Maximum contact resistance
2
6000
Ω
3 to 5
2200
Ω
6 to 10
1200
Ω
11 to 16
700
Ω
Tfr = f
fr
1
BP0
SYNC
BP0
(1/2 bias)
SYNC
BP0
(1/3 bias)
(a) static drive mode.
(b) 1:2 multiplex drive mode.
(c) 1:3 multiplex drive mode.
(d) 1:4 multiplex drive mode.
BP0
(1/3 bias)
SYNC
SYNC
BP0
(1/3 bias)
mgl755



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