SE97BTP datasheet(21/53 Pages) NXP

21 / 53 page

SE97B_1

Product data sheet

Rev. 01 — 27 January 2010

21 of 53

NXP Semiconductors

SE97B

DDR memory module temp sensor with integrated SPD

7.10.3.3

Sequential read

If the master acknowledges the first data byte transmitted by the SE97B, then the device

will continue transmitting as long as each data byte is acknowledged by the master

(Figure 17). If the end of memory is reached during sequential Read, the address counter

will ‘wrap around’ to the beginning of memory, and so on. Sequential Read works with

either ‘Immediate Address Read’ or ‘Selective Read’, the only difference being the starting

byte address.

Fig 17. Sequential read timing

A2 A1 A0

slave address (memory)

START condition

R/W acknowledge

from slave

acknowledge

from master

data from memory

SDA

data from memory

DATA n

+ 1

acknowledge

from master

002aab253

STOP condition

data from memory

DATA n

+ X

no acknowledge

from master

DATA n

SE97BTP 数据表(PDF) 21 Page - NXP Semiconductors

SE97BTP 数据表(HTML) 21 Page - NXP Semiconductors

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53

数据表下载

链接网址

SE97BTP 数据表(PDF) 21 Page - NXP Semiconductors

SE97BTP 数据表(HTML) 21 Page - NXP Semiconductors

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53

数据表 下载

链接网址

数据表下载