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SPC5705BECLLR 数据表(PDF) 10 Page - Freescale Semiconductor, Inc |
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SPC5705BECLLR 数据表(HTML) 10 Page - Freescale Semiconductor, Inc |
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10 / 92 page  MPC5607B Microcontroller Data Sheet, Rev. 3 Preliminary—Subject to Change Without Notice Package pinouts Freescale Semiconductor 10 2.3 208MAPBGA pin configuration Figure 4. 208 MAPBGA configuration 1 234 5678 9 10 11 12 13 14 15 16 A PC[8] PC[1 3] PH[1 5] PJ[4] PH[8] PH[4] PC[5] PC[0] PI[0] PI[1] PC[2] PI[4] PE[1 5] PH[1 1] NC NC A B PC[9] PB[2] PH[1 3] PC[1 2] PE[6] PH[5] PC[4] PH[9] PH[1 0] PI[2] PC[3] PG[1 1] PG[1 5] PG[1 4] PA[1 1] PA[1 0] B C PC[14 ] VDD_ HV PB[3] PE[7] PH[7] PE[5] PE[3] VSS_ LV PC[1] PI[3] PA[5] PI[5] PE[1 4] PE[1 2] PA[9] PA[8] C D PH[14 ] PI[6] PC[1 5] PI[7] PH[6] PE[4] PE[2] VDD _LV VDD _HV NC PA[6] PH[1 2] PG[1 0] PF[1 4] PE[1 3] PA[7] D E PG[4] PG[5] PG[3] PG[2] PG[1] PG[0] PF[1 5] VDD _HV E F PE[0] PA[2] PA[1] PE[1] PH[0] PH[1] PH[3] PH[2] F G PE[9] PE[8] PE[1 0] PA[0] VSS_ HV VSS_ HV VSS_ HV VSS_ HV VDD _HV PI[12 ] PI[13 ] MSE O G H VSS_ HV PE[1 1] VDD _HV NC VSS_ HV VSS_ HV VSS_ HV VSS_ HV MDO 3 MDO 2 MDO 0 MDO 1 H J RESE T VSS_ LV NC NC VSS_ HV VSS_ HV VSS_ HV VSS_ HV PI[8] PI[9] PI[10 ] PI[11 ] J K EVTI NC VDD _BV VDD _LV VSS_ HV VSS_ HV VSS_ HV VSS_ HV VDD _HV_ ADC 1 PG[1 2] PA[3] PG[1 3] K L PG[9] PG[8] NC EVT O PB[1 5] PD[1 5] PD[1 4] PB[1 4] L M PG[7] PG[6] PC[1 0] PC[1 1] PB[1 3] PD[1 3] PD[1 2] PB[1 2] M N PB[1] PF[9] PB[0] VDD _HV PJ[0] PA[4] VSS_ LV EXTA L VDD _HV PF[0] PF[4] VSS_ HV_ ADC 1 PB[1 1] PD[1 0] PD[9] PD[1 1] N P PF[8] PJ[3] PC[7] PJ[2] PJ[1] PA[1 4] VDD _LV XTAL PB[1 0] PF[1] PF[5] PD[0] PD[3] VDD _HV_ ADC 0 PB[6] PB[7] P R PF[12 ] PC[6] PF[1 0] PF[1 1] VDD _HV PA[1 5] PA[1 3] PI[14 ] XTAL PF[3] PF[7] PD[2] PD[4] PD[7] VSS_ HV_ ADC 0 PB[5] R T NC NC NC MCK O NC PF[1 3] PA[1 2] PI[15 ] EXTA L PF[2] PF[6] PD[1] PD[5] PD[6] PD[8] PB[4] T 1 234 5678 9 10 11 12 13 14 15 16 NOTE: The 208 MAPBGA is available only as development package for Nexus 2+. NC = Not connected |
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