PixArt Imaging Inc.

PAC107

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PixArt Imaging Inc.

V1.4, Aug, 2005

SM0_1: Serial port mode control Set/cleared by software

SM2_1: Set by software to disable reception of frames for which bit8 zero

REN_1: Receiver enable bit. Set/cleared by software.

TB8_1: Set/Cleared by hardware. The state of 9

RB8_1: Set/cleared by hardware to indicate state of ninth data bit received

TI_1: Transmit Interrupt flag.

Set by hardware when byte transmitted. Cleared by software after serving.

RI_1: Received Interrupt flag.

Set by hardware when byte received. Cleared by software after serving.

SM1_1: SM2_1 SELECT

00: Shift reg. I/O expansion

01: 8 bit UART, variable data rate

10: 9 bit UART, fixed data rate

11: 9 bit UART, variable data rate

SCON

Address: 98H

bit 7

bit 0

SM0/FE

SM1

SM2

REN

TB8

RB8

TI

RI

FE: Framing Error Bit.

Set by receiver when an invalid stop bit is detected.

The FE bit is not cleared by valid frames but should be cleared by software.

The "SMOD0" bit must be set to enable access to the FE.

SM0, SM1: Serial port operation mode specifier.

SM0 SM1 Mode

Description

Baud rate

0

0

0

Shift register.

Fosc/12

0

1

1

8 bit UART,

Variable data rate

1

0

2

9 bit UART,

Fosc/32 or Fosc/64

1

1

3

9 bit UART,

Variable data rate

SM2: Enable the multiprocessor communication feature in mode 2 & 3. In mode 2 or 3, if

SM2 is set to 1 then RI will not be activated if the received 9

1, if SM2=1 then RI will not be activated if a valid stop bit was not received. In mode0,

SM2 should be 0.