| 数据搜索系统,热门电子元器件搜索 |
|
HT86B50 数据表(PDF) 39 Page - Holtek Semiconductor Inc |
|
|
|||||||||||||||||||||||||||||
HT86B50 数据表(HTML) 39 Page - Holtek Semiconductor Inc |
|
39 / 83 page ![]() HT86BXX/HT86BRXX Rev. 1.70 39 February 22, 2010 b 7 T O N T M 0 T M 1 b 0 N o t i m p l e m e n t e d , r e a d a s " 0 " T i m e r C o u n t i n g E n a b l e 1 : e n a b l e 0 : d i s a b l e O p e r a t i n g M o d e S e l e c t T 0 T M 1 T 1 T M 1 T 3 T M 1 0 0 1 1 T 0 T M 0 T 1 T M 0 T 3 T M 0 0 1 0 1 n o m o d e a v a i l a b l e n o m o d e a v a i l a b l e t i m e r m o d e n o m o d e a v a i l a b l e T M R 0 C / T M R 1 C / T M R 3 C R e g i s t e r N o t i m p l e m e n t e d , r e a d a s " d o n ' t c a r e " P S C 2 P S C 1 P S C 0 T i m e r P r e s c a l e r R a t e S e l e c t T 0 P S C 2 T 1 P S C 2 T 3 P S C 2 0 0 0 0 1 1 1 1 T 0 P S C 1 T 1 P S C 1 T 3 P S C 1 0 0 1 1 0 0 1 1 T 0 P S C 0 T 1 P S C 0 T 3 P S C 0 0 1 0 1 0 1 0 1 T i m e r R a t e 1 : 2 1 : 4 1 : 8 1 : 1 6 1 : 3 2 1 : 6 4 1 : 1 2 8 1 : 2 5 6 Timer Control Register - All Devices b 7 T O N T M 0 T M 1 b 0 N o t i m p l e m e n t e d , r e a d a s " 0 " T i m e r C o u n t i n g E n a b l e 1 : e n a b l e 0 : d i s a b l e T M R 2 C R e g i s t e r N o t i m p l e m e n t e d , r e a d a s " 0 " O p e r a t i n g M o d e S e l e c t T M 2 T M 1 0 0 1 1 T M 2 T M 0 0 1 0 1 n o m o d e a v a i l a b l e n o m o d e a v a i l a b l e t i m e r m o d e n o m o d e a v a i l a b l e Timer Control Register - HT86B40/HT86B50/HT86B60/HT86BR60/HT86B70/HT86B80/HT86B90 Configuring the Timer The Timer is used to measure fixed time intervals, pro- viding an internal interrupt signal each time the Timer overflows. To do this the Operating Mode Select bit pair in the Timer Control Register must be set to the correct value as shown. Control Register Operating Mode Select Bits Bit7 Bit6 10 The internal clock, fSYS, is used as the Timer clock. However, this clock source is further divided by a prescaler, the value of which is determined by the Prescaler Rate Select bits, which are bits 0~2 in the Timer Control Register. After the other bits in the Timer Control Register have been setup, the enable bit, which is bit 4 of the Timer Control Register, can be set high to enable the Timer to run. Each time an internal clock cy- cle occurs, the Timer increments by one. When it is full and overflows, an interrupt signal is generated and the Timer will reload the value already loaded into the preload register and continue counting. The interrupt can be disabled by ensuring that the Timer Interrupt En- able bit in the Interrupt Control Register, INTC, is reset to zero. I n c r e m e n t T i m e r C o n t r o l l e r P r e s c a l e r O u t p u t T i m e r + 1 T i m e r + 2 T i m e r + N T i m e r + N + 1 Timer Mode Timing Diagram |
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |