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VT98521 数据表(PDF) 2 Page - Vaishali Semiconductor |
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VT98521 数据表(HTML) 2 Page - Vaishali Semiconductor |
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2 / 5 page ![]() VT98521 2002-02-25 Page 2 MDST-0017-02 www.vaishali.com Vaishali Semiconductor 747 Camden Avenue, Suite C Campbell CA 95008 Ph. 408.377.6060 Fax 408.377.6063 Table 2. Pin Description No. Name Type Description 1 X1/ICLK I Xtal connection or clock input. 2 VDD P Connect to +3.3V 3 GND P Connect to ground. 4 S1 TI Select 1 for output clock. Connect to ground or VDD or float 5 CLK O Clock output per table 2. 6 S0 TI Select 0 for output clock. Connect to ground or VDD or float. 7 OE I Output Enable. Tri- states CLK output when low. 8 X2 O Xtal connection. Leave unconnected for clock input. Legend: I = Input TI = Tri-level Input O = Output P = Power supply connection Table 3. Absolute Maximum Ratings Parameter Conditions Min Typ Max Units Supply voltage, VDD Referenced to GND 4.6 V Inputs and Clock Outputs Referenced to GND -0.5 4.6 V Soldering Temperature Max of 10 seconds 260 °C Storage temperature -65 150 °C Table 1. Clock Output Table S1 S0 CLK Minimum Input 0 0 4 x input See table 6 0 M 5.3125 x input 20 MHz 0 1 5 x input See table 6 M 0 6.25 x input 4 MHz M M Test* M 1 3.125 x input 8 MHz 1 0 6 x input See table 6 1 M 3 x input See table 6 1 1 8 x input See table 6 0 = Connect to ground. 1 = Connect directly to VDD M = Leave unconnected (floating) * = For Vaishali internal test purposes only |
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