DR73-100-R datasheet(21/28 Pages) AD

21 / 28 page

ADP2300/ADP2301

Rev. 0 | Page 21 of 28

DESIGN EXAMPLE

This section provides the procedures to select the external com-

ponents, based on the example specifications listed in Table 10.

The schematic for this design example is shown in Figure 48.

Table 10. Step-Down DC-to-DC Regulator Requirements

Parameter

Specification

Additional

Requirements

Input Voltage, VIN

12.0 V ± 10%

None

Output Voltage, VOUT

3.3 V, 1.2 A, 1% VOUT

ripple at CCM mode

None

Programmable

UVLO Voltage

VIN start-up voltage

approximately 7.8 V

None

SWITCHING FREQUENCY SELECTION

Select the switching frequency—700 kHz (ADP2300) or 1.4 MHz

(ADP2301)—using the conversion limitation curve shown

in Figure 44 to assess the conversion limitations (the minimum o

time, the minimum off time, and the bootstrap dropout voltage).

For example, in Figure 44 VIN = 12 V ± 10% is within the conver-

sion limitation for both the 700 kHz and 1.4 MHz switching

frequencies for an output voltage of 3.3 V, but choosing the 1.4 MHz

switching frequency provides the smallest sized solution. If higher

efficiency is required, choose the 700 kHz option; however, the

PCB footprint area of the regulator will be larger because of the

bigger inductor and output capacitors.

CATCH DIODE SELECTION

Select the catch diode. A Schottky diode is recommended for best

efficiency because it has a low forward voltage drop and faster

switching speed. The average current of the catch diode in

normal operation, with a typical Schottky diode forward

voltage, can be calculated using the following equation:

(max)

)

(

LOAD

AVG

DIODE

⎟

⎠

⎜

⎝

−

OUT

⎟

⎞

⎜

⎛

where:

VOUT = 3.3 V.

VIN = 12 V.

ILOAD(max) = 1.2 A.

VD = 0.4 V.

Therefore, IDIODE(AVG) = 0.85 A.

However, for the worst-case condition, in which there is a shorted

output, the diode current would be increased to 2 A typical, deter-

mined by the peak switch current limit (see Table 1). In this case,

selecting a B230A, 2.0 A/30 V surface-mount Schottky diode

would result in more reliable operation.

INDUCTOR SELECTION

Select the inductor by using the following equation:

(

)

⎟⎟

⎠

⎞

⎜⎜

⎝

⎛

−

OUT

LOAD

OUT

(max)

where:

VOUT = 3.3 V.

VIN = 12 V.

ILOAD(max) = 1.2 A.

VD = 0.4 V.

fSW = 1.4 MHz.

This results in L = 5.15 μH. The closest standard value is 4.7 μH;

therefore, ΔIRIPPLE = 0.394 A.

The inductor peak current is calculated using the following

equation:

(max)

RIPPLE

LOAD

PEAK

where:

ILOAD(max) = 1.2 A.

ΔIRIPPLE = 0.394 A.

Therefore, the calculated peak current for the inductor is 1.397 A.

However, to protect the inductor from reaching its saturation

point in the current-limit condition, the inductor should be rated

for at least a 2.0 A saturation current for reliable operation.

OUTPUT CAPACITOR SELECTION

Select the output capacitor based on the output voltage ripple

requirement, according to the following equation:

⎟⎟

⎠

⎞

⎜⎜

⎝

⎛

OUT

RIPPLE

ESR

where:

ΔIRIPPLE = 0.394 A.

fSW = 1.4 MHz.

ΔVRIPPLE = 33 mV.

If the ESR of the ceramic capacitor is 3 mΩ, then COUT = 1.2 μF.

Because the output capacitor is one of the two external components

that control the loop stability, most applications using the ADP2301

(1.4 MHz switching frequency) require a minimum 10 μF capaci-

tance to ensure stability. According to the recommended external

components in Table 11, choose 22 μF with a 6.3 V voltage rating

for this example.

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