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WM2637CD 数据表(PDF) 5 Page - Wolfson Microelectronics plc |
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WM2637CD 数据表(HTML) 5 Page - Wolfson Microelectronics plc |
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5 / 11 page ![]() WM2637 Production Data WOLFSON MICROELECTRONICS LTD PD Rev 1.0 July 99 5 SERIAL INTERFACE NCS SCLK DIN D15 D14 D13 D12 D11 D0 t SUCSS t WCL t WCH t SUCS1 t SUCS2 t DCS1 t HDCLK t SUDCLK Figure 1 Timing Diagram Test Conditions: RL = 10k Ω, C L = 100pF. VDD = 5V ±± 10%, V REF = 2.048V and VDD = 3V ±± 10%, V REF = 1.024V over recommended operating free- air temperature range (unless noted otherwise) SYMBOL TEST CONDITIONS MIN TYP MAX UNIT tSUCSS Setup time NCS low before SCLK low 10 ns tSUCS1 Setup time, rising edge of SCLK to rising edge of NCS, external end of write 10 ns tSUCS2 Setup time, rising edge of SCLK to falling edge of NCS, start of next write cycle 5 ns tWCL Pulse duration, SCLK high 25 ns tWCH Pulse duration, SCLK low 25 ns tSUDCLK Setup time, data ready before SCLK falling edge 10 ns tHDCLK Hold time, data held valid after SCLK falling edge 5 ns |
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