Wolfson Microelectronics

11

WM5621L

Bit

Control

DACA

DACB

DACC

DACD

Word

Write

Write

Write

Write

Start Bit

1

1

1

1

1

Register

0

1

1

1

1

Select

3

MODE

0

0

1

1

4

RNGA

0

1

0

1

5

RNGB

D7

D7

D7

D7

6

RNGC

D6

D6

D6

D6

7

RNGD

D5

D5

D5

D5

8

SIA

D4

D4

D4

D4

9

SIB

D3

D3

D3

D3

10

SIC

D2

D2

D2

D2

11

SID

D1

D1

D1

D1

12

ACT

D0

D0

D0

D0

Bit

Power-up state

Function

MODE

0

Control serial interface

RNG A

1

DACA range select

(0 = x1, 1 = x2)

RNG B

1

DACB range select

(0 = x1, 1 = x2)

RNG C

1

DACC range select

(0 = x1, 1 = x2)

RNG D

1

DACD range select

(0 = x1, 1 = x2)

SIA

0

DACA shutdown inhibit

SIB

0

DACB shutdown inhibit

SIC

0

DACC shutdown inhibit

SID

0

DACD shutdown inhibit

ACT

0

Software shutdown control

Table 1

SIA

ACT

HWACT

DAC status

0

0

0

shutdown

0

0

1

shutdown

0

1

0

shutdown

0

1

1

active

1

0

0

active

1

0

1

active

1

1

0

active

1

1

1

active

Control Register

Table 2

Linearity, offset, and gain error using

single end supplies

When an amplifier is operated from a single supply, the

voltage offset can still be either positive or negative. With

a positive offset, the output voltage changes on the first

code change. With a negative offset the output voltage

may not change with the first code depending on the

magnitude of the offset voltage.

The output amplifier, with a negative voltage offset,

attempts to drive the output to a negative voltage.

However, because the most negative supply rail is GND,

the output cannot drive to a negative voltage.

So when the output offset voltage is negative, the output

voltage remains at ZERO volts until the input code value

produces a sufficient output voltage to overcome the

inherent negative offset voltage, resulting in the transfer

function shown in Figure 5.

This negative offset error, not the linearity error, produces

this breakpoint. The transfer function would have followed

the dotted line if the output buffer could drive to a negative

voltage.

The control register contains 10 active bits. The MODE bit

controls the operation of the serial interface as described

above. The function of the control register bits, and their

state on power-up, are shown in table 2.

The shutdown state of each DAC is controlled through the

shutdown inhibit bit for that channel (SIx), the ACT bit of the

control register, and the HWACT pin. Table 3 shows the

logical action of these three controlling bits for DAC A. It is

possible, for example, to have any combination of DACs

switched from shutdown to active by the HWACT pin, while

the remaining DACs are held always active (achieve this by

setting ACT=1, SIx=0 for the switching DACs, and SIx=1 for

the always active DACs).

Table 3