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WM8733

WOLFSON MICROELECTRONICS LTD

PP Rev 1.3 July 2000

9

SYSTEM CLOCK

The system clock is used to operate the digital filters and the noise shaping circuits. The system

clock input is at pin 14 (SCKI). The frequency of WM8733’s system clock should be set to 256fs or

384fs or 512fs, (where fs is the audio sampling frequency). The sample rate is typically: 32 kHz, 44.1

kHz, 48 kHz or 96kHz.

WM8733 has a system clock detection circuit that automatically determines whether the system

clock being supplied is at 256fs or 384fs or 512fs. The system clock should be synchronised with

LRCIN, but WM8733 is tolerant of phase differences.

Severe distortion in the phase difference

between LRCIN and the system clock will be detected, and cause the device to automatically

resynchronise. During resynchronisation, the output of the device will either repeat the previous

sample, or drop the next sample, depending on the nature of the phase slip. This will ensure minimal

“click“ at the analog outputs during resynchronisation.

t

SCKIH

t

SCKIL

SCKI

Figure 5 System Clock Timing Requirements

SYSTEM CLOCK FREQUENCY (MHz)

SAMPLING RATE

(LRCIN)

256fs

384fs

512fs

32 kHz

8.192

12.288

16.384

44.1 kHz

11.2896

16.9340

22.5792

48 kHz

12.288

18.432

24.576

96kHz

24.576

36.864

49.152

Table 5 System Clock Frequencies Versus Sampling Rate

LRCIN

BCKIN

DIN

t

BCH

t

BCL

t

LB

t

BL

t

BCY

t

DS

t

DH

Figure 6 Audio Data Input Timing