| 数据搜索系统,热门电子元器件搜索 |
|
WM8736 数据表(PDF) 13 Page - Wolfson Microelectronics plc |
|
|
|||||||||||||||||||||||||||||
WM8736 数据表(HTML) 13 Page - Wolfson Microelectronics plc |
|
13 / 17 page ![]() Production Data WM8736 WOLFSON MICROELECTRONICS LTD PD Rev 2.1 January 2001 13 The master gain register M8 (A[3:0] = 0110) is used to write a gain value to all channels simultaneously. Bit 8 (LDM) controls the update in the same way as the attenuation registers, and is to be set to 1 for correct operation in this mode. LEFT AND RIGHT DAC SOFT MUTE CONTROL Soft mute is controlled by setting bit MU, register M2:bit 0. A high level on MU (MU = 1) will cause the output to be muted, the effect of which is to ramp the signal down in the digital domain so that there is no discernible click. This can be seen in Figure 6 Mute Circuit Operation. DE-EMPHASIS CONTROL Bit 1 (DE) in register M2 is used to control digital de-emphasis. A low level on bit 1 (DE = 0) disables de-emphasis whilst a high level enables de-emphasis (DE = 1). De-emphasis applied to the filters shapes the frequency response of the digital filter according to the input sample frequency. LEFT AND RIGHT DAC OPERATION CONTROL Bit 2 (OPE) in register M2 is used for operation control. With OPE = 0 (default) the device functions normally. With OPE = 1 the device is disabled and the outputs are held at midrail. Current consumption of the digital section is minimized, but analogue sections remain active in order to preserve d.c. levels. INPUT AUDIO WORD RESOLUTION WM8736 allows maximum flexibility over the control of the audio data interface, allowing selection of format type, word length, and sample rates. Bits 3 and 4 of register M2 (IW[1:0]) are used to determine the input word resolution. WM8736 supports 16-bit, 18-bit, 20-bit and 24-bit formats as described in Table 10. BIT 4 (IW1) BIT 3 (IW0) INPUT RESOLUTION 0 0 16-bit data word 0 1 20-bit data word 1 0 24-bit data word 1 1 18-bit data word Table 10 Input Data Resolution DAC OUTPUT CONTROL Bits 5, 6, 7 and 8 (PL[3:0]) of register M2 are used to control the output format as shown in Table 11. PL3 PL2 PL1 PL0 LEFT OUTPUT RIGHT OUTPUT NOTE 0 0 0 0 MUTE MUTE Mute both channels 0 001 L MUTE 0 010 R MUTE 0 011 (L + R)/2 MUTE 0 100 MUTE L 0 101 L L 0 1 1 0 R L Reverse channels 0 111 (L + R)/2 L 1 000 MUTE R 1 0 0 1 L R Stereo mode 1 010 R R 1 011 (L + R)/2 R 1 100 MUTE (L + R)/2 1 101 L (L + R)/2 1 110 R (L + R)/2 1 1 1 1 (L + R)/2 (L + R)/2 Mono mode Table 11 Programmable Output Format |
|
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |