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SS6621 数据表(PDF) 7 Page - Silicon Standard Corp. |
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SS6621 数据表(HTML) 7 Page - Silicon Standard Corp. |
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7 / 12 page ![]() www.SiliconStandard.com 7 of 12 SS6620/21/2 n BLOCK DIAGRAM + + + + + OUT VIN CLSEL SHDN LBO LBI REF FB Mirror Q R S F/F Minimum Off-Time One Shot Ref erence Voltage GND LX BATT L 1 R1 200 Ω Q3 Q2 Q1 Damping Switch Maximum On-Time OUT One Shot C3 220 µF C1 100 µF 47 µF 0.1 µF C4 0.1 µF n PIN DESCRIPTIONS SS6620/ SS6621 PIN 1: FB- Connect to OUT for +3.3V output. Use a resistor network to set the out- put voltage from +1.8V to +4.0V. PIN 2: LBI- Low-battery comparator input. Inter- nally set to trip at +1.23V. PIN 3: LBO- Open-drain low battery comparator output. Output is low when VLBI is <1.23V. LBO is high impedance dur- ing shutdown. PIN 4: REF- 1.23V reference voltage. Bypass with a 0.1 µF capacitor. PIN 5: SHDN- Shutdown input. High=operating, low=shutdown. PIN 6: GND- Ground PIN 7: LX- N-channel and P-channel power MOSFET drain. PIN 8: OUT- Power output. OUT provides boot- strap power to the IC. Rev.2.01 6/06/2003 |
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