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4 of 6

SS6652

PIN 1: VIN

- Input supply voltage (2.4V~7V)

PIN 2: VREF - Reference output (1.22V). Bypass

with a 0.047

µF capacitor to GND.

Sourcing capability is guaranteed

to be greater than 250

µA.

>1.5V = normal operation,

GND = shutdown

In shutdown mode DLOW and

DHI pins are at high level.

PIN 4: FB

- Feedback signal input to sense

ground. Connecting a resistor R1

pin yields the output voltage:

PIN 5: GND - Power ground.

PIN 6: DLOW - Driver sinking output. Connected

to DHI when using an external P-

channel MOSFET. When using an

external PNP bipolar transistor,

connect a resistor RB from this

pin to DHI. RB value depends on

transistor. By adjusting the RB

value, efficiency can be optimized.

PIN 7: DHI

- Driver sourcing output. Connect to

gate of the external P-channel

MOSFET or base of the PNP bi-

polar transistor.

PIN 8: CL

- Current-limit

input.

This

pin

clamps the switch peak current to

prevent over-current damage to

the external switch.

2

4

6

8

0

0.2

0.4

0.6

0.8

100

µH

120

µH

150

µH

180

µH

220

µH

Inductor Value

Typical Application Circuit

The typical application circuit generates an adjustable

negative voltage for contrast bias of LCD displays. Ef-

ficiency and output power can be optimized by using

appropriate inductor and switch. The following formu-

lae provide a guideline for determining the optimal

component values:

L

= (11.1 0.15

V )

V

I

V

IN

IN

OUT

OUT

−

×

×

×

PNP :

V

V

V

CEO

IN

OUT

>

+

I

200

I

V

C, MAX

OUT

IN

≥

×

V

0. 4 V at I

= 200

I

V

CE

C

OUT

IN

<

×

and

10

β =

RB

≅ 3 x L x (V

Rev.2.01 6/26/2003