X68C64

2

PIN DESCRIPTIONS

Multiplexed low-order addresses and data. The ad-

dresses flow into the device while AS is HIGH. After AS

transitions from a HIGH to LOW the addresses are

latched. Once the addresses are latched these pins

input data or output data depending on E, R/

W, and CE.

High order addresses flow into the device when AS is

HIGH and are latched when AS goes LOW.

Chip Enable (CE)

The Chip Enable input must be HIGH to enable all read/

write operations. When CE is LOW and AS is LOW, the

X68C64 is placed in the low power standby mode.

Enable (E)

When used with a MC6801 or MC6803, the E input is tied

directly to the E output of the microcontroller.

Read/Write (R/

W)

When used with a MC6801 or MC6803, the R/

W input is

tied directly to the R/

W output of the microcontroller.

Address Strobe (AS)

Addresses flow through the latches to address decoders

when AS is HIGH and are latched when AS transitions

from a HIGH to LOW.

Device Select (

SEL)

Write Control (

WC)

The Write Control allows external circuitry to abort a

page load cycle once it has been initiated. This input is

useful in applications in which a power failure or proces-

sor RESET could interrupt a page load cycle. In this

case, the microcontroller might drive all signals HIGH,

after Read/Write (R/

W) goes HIGH, the write cycle will

be aborted.

When

enabled to perform write operations. When

WC is HIGH

normal read operations may be performed, but all at-

tempts to write to the device will be disabled.

PIN CONFIGURATION

PIN NAMES

Symbol

Description

AS

Address Strobe

Address Inputs/Data I/O

Address Inputs

E

Enable Input

R/

W

Read/Write Input

CE

Chip Enable

WC

Write Control

SEL

Ground

Supply Voltage

NC

No Connect

3868 PGM T01.1

3868 FHD F01.1

NC

A12

NC

NC

WC

SEL

A/D0

A/D1

A/D2

A/D3

A/D4

VSS

1

2

3

4

5

6

7

8

9

10

11

12

24

23

22

21

20

19

18

17

16

15

14

13

VCC

R/W

AS

A8

A9

A11

E

A10

CE

A/D7

A/D6

A/D5

X68C64

DIP/SOIC