ADA4320-1

Rev. 0 | Page 11 of 16

APPLICATIONS INFORMATION

GENERAL APPLICATIONS

The ADA4320-1 is primarily intended for use as the reverse

channel power amplifier (PA) in DOCSIS® 3.0 customer premises

equipment (CPE), including cable modems, E-MTAs, and

DOCSIS-enabled set-top boxes. The signals are typically QPSK or

QAM waveforms generated by the upstream modulator and DAC.

To sufficiently attenuate DAC images, a low-pass reconstruction

filter is recommended between the DAC output and the

ADA4320-1. A differential filter is preferred, and its output

impedance should match the 640 Ω input impedance of the

ADA4320-1.

Varying distances between the CPE and the cable modem

termination system (CMTS), as well as diplexers and splitters

that may exist in the signal path, require the amplifier to

provide a wide range of output power. The combination of a

high output level, excellent linearity, and 59 dB gain range of the

ADA4320-1 enables the CPE to overcome inline losses and

ensures adequate signal strength at the upstream termination.

CIRCUIT DESCRIPTION

In power-up mode, the ADA4320-1 comprises three analog

functions. The input amplifier (preamp) can be used single-ended

or balanced (differential). If the input is used in the balanced

configuration, it is imperative that the input signals be 180° out

of phase and of equal amplitude. A Vernier adjustment amplifier

controls the 1 dB gain steps.

The digital attenuator (DA) stage provides coarse adjustment in

6 dB steps. It also scales the current supplied to the output stage.

Both the preamp and DA are differential (balanced) to improve

power supply rejection and linearity.

The differential current is output from the DA to the output stage.

The output stage, with its 300 Ω balanced output impedance,

maintains proper matching to a 75 Ω load when used with a

2:1 (turns ratio) balun transformer.

PROGRAMMING

The ADA4320-1 is controlled via a unidirectional, 3-wire serial

interface (SPI-compatible) consisting of CLK, DATEN, and SDATA

signals. An 8-bit data-word containing the output stage current

level (Bits[7:6]) and desired gain code (Bits[5:0]) is clocked into

the SDATA port, MSB first.

The programmable current level (CL) range of the ADA4320-1 is

CL3 (highest) to CL0 (lowest). The programmable gain range is

+32 dB (Gain Code 60) to −27 dB (Gain Code 01), in steps of 1 dB

per least significant bit (LSB), providing a total gain range of 59 dB.

Table 7. Data-Word for Setting Current and Gain Levels

CL

Typical

Current

(mA)

CL[7:6]

(Bin)

Gain[5:0]

(Hex)

Cain

Code

(Dec)

Typical

Gain (dB)

3

260 to 77

11

3C to 01

60 to 01

+32 to −27

2

235 to 73

10

3C to 01

60 to 01

+32 to −27

1

210 to 70

01

3C to 01

60 to 01

+32 to −27

0

180 to 65

00

3C to 01

60 to 01

+32 to −27

The sequence of loading the SDATA register starts on the falling

edge of the DATEN pin, which activates the CLK line. Data on

the SDATA line is clocked into the serial shift register on the

rising edge of CLK, MSB first. The data-word is latched into

the attenuator core on the rising edge of DATEN. Serial interface

timing for the ADA4320-1 is shown in

and

.

Figure 2

Figure 3

CURRENT LEVEL AND GAIN ADJUSTMENT

Gain adjustment and current scaling allow the PA to achieve the

high output levels and linearity required for multiple-channel

DOCSIS 3.0 compliance, while offering significantly reduced

power consumption in single-channel and lifeline battery-backup

modes of operation.

There are two methods of adjusting the output stage current of

the ADA4320-1. The first is performed automatically, lowering

output current as attenuation is increased (gain is reduced).

As shown in Figure 23, for every 6 dB reduction in gain, output

stage current is decreased. At higher gain settings, this is more

pronounced. At maximum gain and maximum current level,

a step down of 6 dB reduces the supply current by 33%.

The second method, which allows the user to program one of

four preset current levels (CL3 to CL0) at any gain setting, is

shown by the individual traces in Figure 23.

300

50

100

150

200

250

30

–30

–18

–6

6

18

0

1224364860

GAIN CODE

CURRENT LEVEL 3

CURRENT LEVEL 2

CURRENT LEVEL 1

CURRENT LEVEL 0

GAIN

Figure 23. Gain and Current Scaling