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AM1806_1005 数据表(PDF) 93 Page - Texas Instruments

部件名 AM1806_1005
功能描述  AM1806 ARM Microprocessor
PDF  241 Pages
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制造商  TI [Texas Instruments]
网页  http://www.ti.com
标志 TI - Texas Instruments

AM1806_1005 数据表(HTML) 93 Page - Texas Instruments

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SPRS658B – FEBRUARY 2010 – REVISED MAY 2010
Table 6-17. EMIFA Supported SDRAM Configurations(1)
SDRAM
EMIFA Data
Memory
Memory Data
Number of
Total Memory Total Memory
Bus Size
Rows
Columns
Banks
Density
Bus Width
Memories
(Mbits)
(Mbytes)
(bits)
(Mbits)
(bits)
1
16
16
8
1
256
32
256
1
16
16
8
2
512
64
512
1
16
16
8
4
1024
128
1024
1
16
16
9
1
512
64
512
1
16
16
9
2
1024
128
1024
16
1
16
16
9
4
2048
256
2048
1
16
16
10
1
1024
128
1024
1
16
16
10
2
2048
256
2048
1
16
16
10
4
4096
512
4096
1
16
16
11
1
2048
256
2048
1
16
16
11
2
4096
512
4096
1
16
15
11
4
4096
512
4096
2
16
16
8
1
256
32
128
2
16
16
8
2
512
64
256
2
16
16
8
4
1024
128
512
2
16
16
9
1
512
64
256
2
16
16
9
2
1024
128
512
8
2
16
16
9
4
2048
256
1024
2
16
16
10
1
1024
128
512
2
16
16
10
2
2048
256
1024
2
16
16
10
4
4096
512
2048
2
16
16
11
1
2048
256
1024
2
16
16
11
2
4096
512
2048
2
16
15
11
4
4096
512
2048
(1)
The shaded cells indicate configurations that are possible on the EMIFA interface but as of this writing SDRAM memories capable of
supporting these densities are not available in the market.
6.10.3 EMIFA SDRAM Loading Limitations
EMIFA supports SDRAM up to 100 MHz with up to two SDRAM or asynchronous memory loads.
Additional loads will limit the SDRAM operation to lower speeds and the maximum speed should be
confirmed by board simulation using IBIS models.
Copyright © 2010, Texas Instruments Incorporated
Peripheral Information and Electrical Specifications
93
Submit Documentation Feedback
Product Folder Link(s): AM1806



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