74LVC1G74_8

© NXP B.V. 2009. All rights reserved.

Product data sheet

Rev. 08 — 3 December 2009

4 of 21

NXP Semiconductors

74LVC1G74

Single D-type flip-flop with set and reset; positive edge trigger

6.2 Pin description

7.

Functional description

[1]

H = HIGH voltage level;

L = LOW voltage level;

X = don’t care.

Fig 6.

Pin configuration SOT996-2 (XSON8U)

Fig 7.

Pin configuration SOT902-1 (XQFN8U)

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74LVC1G74

Transparent top view

8

7

6

5

1

2

3

4

CP

D

Q

GND

SD

RD

Q

001aaf641

D

RD

CP

Q

SD

Q

Transparent top view

3

6

1

5

7

2

terminal 1

index area

74LVC1G74

Table 3.

Pin description

Symbol

Pin

Description

SOT505-2, SOT765-1, SOT833-1,

SOT996-2 and SOT1089

SOT902-1

CP

1

7

clock input (LOW-to-HIGH, edge-triggered)

D

2

6

data input

Q

3

5

complement output

GND

4

4

ground (0 V)

Q

5

3

true output

RD

6

2

asynchronous reset-direct input (active LOW)

SD

7

1

asynchronous set-direct input (active LOW)

8

8

supply voltage

Table 4.

Function table for asynchronous operation[1]

Input

Output

SD

RD

CP

D

Q

Q

L

H

XXH

L

H

L

XXL

H

L

L

XXH

H