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TPS2061DBVT 数据表(PDF) 3 Page - Texas Instruments

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部件名 TPS2061DBVT
功能描述  CURRENT-LIMITED, POWER-DISTRIBUTION SWITCHES
PDF  38 Pages
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制造商  TI [Texas Instruments]
网页  http://www.ti.com
标志 TI - Texas Instruments

TPS2061DBVT 数据表(HTML) 3 Page - Texas Instruments

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TPS2061, TPS2062, TPS2063
TPS2065, TPS2066, TPS2067
www.ti.com
SLVS490I – DECEMBER 2003 – REVISED OCTOBER 2009
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range unless otherwise noted
(1)
UNIT
Input voltage range, VI(IN)
(2)
-0.3 V to 6 V
Output voltage range, VO(OUT)
(2), V
O(OUTx)
-0.3 V to 6 V
Input voltage range, VI(EN), VI(EN), VI(ENx), VI(ENx)
-0.3 V to 6 V
Voltage range, VI(OC), VI(OCx)
-0.3 V to 6 V
Continuous output current, IO(OUT), IO(OUTx)
Internally limited
Continuous total power dissipation
See Dissipation Rating Table
Operating virtual junction temperature range, TJ
-40°C to 150°C
Human body model
2 kV
Electrostatic discharge (ESD) protection
Charge device model (CDM)
500 V
(1)
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2)
All voltages are with respect to GND.
DISSIPATING RATING TABLE
TA ≤ 25°C
DERATING FACTOR
TA = 70°C
TA = 85°C
PACKAGE
POWER RATING
ABOVE TA = 25°C
POWER RATING
POWER RATING
D-8(1)
585.82 mW
5.8582 mW/°C
322.20 mW
234.32 mW
DGN-8(2)
1712.3 mW
17.123 mW/°C
941.78 mW
684.33 mW
D-16(1)
898.47 mW
8.9847 mW/°C
494.15 mW
359.38 mW
285 mW
2.85 mW/°C
155 mW
114 mW
DBV-5(3)
704 mW
7.04 mW/°C
387 mW
281 mW
(1)
Power ratings are based on the low-k board (1 signal, 1 layer).
(2)
Power ratings are based on the high-k board (2 signal, 2 plane) with PowerPAD™ vias to the internal ground plane.
(3)
Lower ratings are for low-k printed circuit board layout (single -sided). Higher ratings are for enhanced high-k layout, (2 signal, 2 plane)
with a 1mm2 copper pad on pin 2 and 2 vias to the ground plane.
RECOMMENDED OPERATING CONDITIONS
MIN
MAX
UNIT
Input voltage, VI(IN)
2.7
5.5
V
Input voltage, VI(EN), VI(EN), VI(ENx), VI(ENx)
0
5.5
V
Continuous output current, IO(OUT), IO(OUTx)
0
1
A
Operating virtual junction temperature, TJ
-40
125
°C
ELECTRICAL CHARACTERISTICS
over recommended operating junction temperature range, VI(IN) = 5.5 V, IO = 1 A, VI(ENx) = 0 V, or VI(ENx) = 5.5 V (unless
otherwise noted)
PARAMETER
TEST CONDITIONS (1)
MIN
TYP
MAX
UNIT
POWER SWITCH
Static drain-source on-state
resistance, 5-V operation
VI(IN) = 5 V or 3.3 V, IO = 1 A, -40°C ≤ TJ ≤ 125°C
70
135
m
and 3.3-V operation
rDS(on)
Static drain-source on-state
resistance, 2.7-V
VI(IN) = 2.7 V, IO = 1 A, -40°C ≤ TJ ≤ 125°C
75
150
m
operation
VI(IN) = 5.5 V
0.6
1.5
tr
Rise time, output
VI(IN) = 2.7 V
0.4
1
CL = 1 μF, RL = 5 Ω, TJ = 25°C
ms
VI(IN) = 5.5 V
0.05
0.5
tf
Fall time, output
VI(IN) = 2.7 V
0.05
0.5
(1)
Pulse-testing techniques maintain junction temperature close to ambient temperature; thermal effects must be taken into account
separately.
Copyright © 2003–2009, Texas Instruments Incorporated
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Product Folder Link(s): TPS2061 TPS2062 TPS2063 TPS2065 TPS2066 TPS2067



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