ISO7221xD

1

2

3

4

5

6

7

8

GND2

INB

V

CC2

V

CC1

OUTB

GND1

INA

OUTA

ISO7220xD

1

2

3

4

5

6

7

8

GND2

INB

V

CC2

V

CC1

OUTB

GND1

OUTA

INA

ISO7220A, ISO7220B, ISO7220C, ISO7220M

ISO7221A, ISO7221B, ISO7221C, ISO7221M

www.ti.com

SLLS755K – JULY 2006 – REVISED JANUARY 2010

DUAL DIGITAL ISOLATORS

Check for Samples: ISO7220A, ISO7220B, ISO7220C, ISO7220M, ISO7221A, ISO7221B, ISO7221C, ISO7221M

1

FEATURES

2

•

1, 5, 25, and 150-Mbps Signaling Rate Options

•

Operates with 3.3-V or 5-V Supplies

–

Low Channel-to-Channel Output Skew;

•

4 kV ESD Protection

1 ns max

•

High Electromagnetic Immunity

–

Low Pulse-Width Distortion (PWD);

•

–40°C to 125°C Operating Range

1 ns max

–

Low Jitter Content; 1 ns Typ at 150 Mbps

APPLICATIONS

•

Industrial Fieldbus

•

Typical 25-Year Life at Rated Voltage

(see app. note SLLA197 and Figure 20)

–

Modbus

–

Profibus™

•

–

DeviceNet™ Data Buses

–

UL 1577, IEC 60747-5-2 (VDE 0884, Rev 2),

•

Computer Peripheral Interface

IEC 61010-1, IEC 60950-1 and CSA

Approved

•

Servo Control Interface

–

50 kV/ms Typical Transient Immunity

•

Data Acquisition

DESCRIPTION

The ISO7220 and ISO7221 are dual-channel digital isolators. To facilitate PCB layout, the channels are oriented

in the same direction in the ISO7220 and in opposite directions in the ISO7221. These devices have a logic input

4000 V. Used in conjunction with isolated power supplies, these devices block high voltage, isolate grounds, and

prevent noise currents on a data bus or other circuits from entering the local ground and interfering with or

damaging sensitive circuitry.

A binary input signal is conditioned, translated to a balanced signal, then differentiated by the capacitive isolation

barrier. Across the isolation barrier, a differential comparator receives the logic transition information, then sets or

resets a flip-flop and the output circuit accordingly. A periodic update pulse is sent across the barrier to ensure

the proper dc level of the output. If this dc-refresh pulse is not received every 4 ms, the input is assumed to be

unpowered or not being actively driven, and the failsafe circuit drives the output to a logic high state.

The small capacitance and resulting time constant provide fast operation with signaling rates available from 0

input that prevents transient pulses from being passed to the output of the device. The M-option devices have

These devices require two supply voltages of 3.3 V, 5 V, or any combination. All inputs are 5-V tolerant when

supplied from a 3.3-V supply and all outputs are 4-mA CMOS.

These devices are characterized for operation over the ambient temperature range of –40°C to 125°C.

(1)

The signaling rate of a line is the number of voltage transitions that are made per second expressed in the units bps (bits per second).

1

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2

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PRODUCTION DATA information is current as of publication date.

Copyright © 2006–2010, Texas Instruments Incorporated

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.