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XIO2001 数据表(PDF) 21 Page - Texas Instruments |
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XIO2001 数据表(HTML) 21 Page - Texas Instruments |
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21 / 128 page  XIO2001 www.ti.com SCPS212D – MAY 2009 – REVISED JANUARY 2010 Table 2-7. Miscellaneous Terminals (continued) ZGU ZAJ PNP I/O CELL CLAMP EXTERNAL SIGNAL DESCRIPTION BALL # BALL # PIN # TYPE TYPE RAIL PARTS GPIO3 // N11 L08 58 I/O LV VDD_33 GPIO3 or serial-bus data. This terminal SDA CMOS functions as serial-bus data if a pullup resistor is detected on SCL or when the SBDETECT bit is Optional set in the Serial Bus Control and Status pullup Register (see Section 4.58). If no pullup is resistor detected then this terminal functions as GPIO3. Note: In serial-bus mode, an external pullup resistor is required to prevent the SDA signal from floating. GPIO4 // M10 M10 59 I/O LV VDD_33 GPIO4 or serial-bus clock. This terminal SCL CMOS functions as serial-bus clock if a pullup resistor is detected on SCL or when the SBDETECT bit is set in the Serial Bus Control and Status Register (see Section 4.58). If no pullup is detected then this terminal functions as GPIO4. Optional pullup Note: In serial-bus mode, an external pullup resistor resistor is required to prevent the SCL signal from floating. Note: This terminal has an internal active pullup resistor. The pullup is only active when reset is asserted or when the GPIO is configured as an input. GRST N13 M11 66 I LV VDD_33 Global reset input. Asynchronously resets all CMOS _COMBIO logic in device, including sticky bits and power management state machines. – Note: The GRST input buffer has both hysteresis and an internal active pullup. The pullup is active at all times. PCLK66_SE B12 A11 98 I LV VDD_33 PCI clock select. This terminal determines the L CMOS default PCI clock frequency driven out the CLKOUTx terminals. 0 = 50 MHz PCI Clock Optional pulldown 1 = 66 MHz PCI Clock resistor Note: This terminal has an internal active pullup resistor. This pullup is active at all times. Note: M66EN terminal also has an affect of PCI clock frequency. SERIRQ N08 M08 52 I/O PCI Bus PCIR Serial IRQ interface. This terminal functions as Pullup or a serial IRQ interface if a pullup is detected pulldown when PERST is deasserted. If a pulldown is resistor detected, then the serial IRQ interface is disabled. VREG_PD3 D12 E11 90 I LV VDD_33 3.3-V voltage regulator powerdown. This 3 CMOS _COMBIO Pulldown terminal should always be tied directly to resistor ground or an optional pulldown resistor can be used. Copyright © 2009–2010, Texas Instruments Incorporated Overview 21 Submit Documentation Feedback Product Folder Link(s): XIO2001 |
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