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MCP4921 数据表(PDF) 19 Page - Microchip Technology |
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MCP4921 数据表(HTML) 19 Page - Microchip Technology |
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19 / 50 page ![]() 2010 Microchip Technology Inc. DS22248A-page 19 MCP4901/4911/4921 4.0 GENERAL OVERVIEW The MCP4901, MCP4911 and MCP4921 are single channel voltage output 8-bit, 10-bit and 12-bit DAC devices, respectively. These devices include a VREF input buffer, a rail-to-rail output amplifier, shutdown and reset management circuitry. The devices use an SPI serial communication interface and operate with a single-supply voltage from 2.7V to 5.5V. The DAC input coding of these devices is straight binary. Equation 4-1 shows the DAC analog output voltage calculation. EQUATION 4-1: ANALOG OUTPUT VOLTAGE (VOUT) The ideal output range of each device is: • MCP4901 (n = 8) (a) 0V to 255/256*VREF when gain setting = 1x. (b) 0V to 255/256*2*VREF when gain setting = 2x. •MCP4911 (n = 10) (a) 0V to 1023/1024*VREF when gain setting = 1x. (b) 0V to 1023/1024*2*VREF when gain setting = 2x. • MCP4921 (n = 12) (a) 0V to 4095/4096*VREF when gain setting = 1x. (b) 0V to 4095/4096*2*VREF when gain setting = 2x. 1 LSb is the ideal voltage difference between two successive codes. Table 4-1 illustrates the LSb calculation of each device. 4.1 DC Accuracy 4.1.1 INL ACCURACY Integral Non-Linearity (INL) error is the maximum deviation between an actual code transition point and its corresponding ideal transition point, after offset and gain errors have been removed. The two endpoints (from 0x000 and 0xFFF) method is used for the calcu- lation. Figure 4-1 shows the details. A positive INL error represents transition(s) later than ideal. A negative INL error represents transition(s) ear- lier than ideal. FIGURE 4-1: Example for INL Error. 4.1.2 DNL ACCURACY A Differential Non-Linearity (DNL) error is the measure of variations in code widths from the ideal code width. A DNL error of zero indicates that every code is exactly 1 LSB wide. Note: See the output swing voltage specification in Section 1.0 “Electrical Characteris- tics”. V OUT V REF D n 2 n -------------------------------G = Where: VREF =EXternal voltage reference Dn = DAC input code G= = = Gain Selection 2 for <GA> bit = 0 1 for <GA> bit = 1 n= = = = DAC Resolution 8 for MCP4901 10 for MCP4911 12 for MCP4912 TABLE 4-1: LSb OF EACH DEVICE Device Gain Selection LSb Size MCP4901 (n = 8) 1x VREF/256 2x (2*VREF)/256 MCP4911 (n = 10) 1x VREF/1024 2x (2*VREF)/1024 MCP4921 (n = 12) 1x VREF/4096 2x (2*VREF)/4096 where VREF is the external voltage reference. 111 110 101 100 011 010 001 000 Digital Input Code Actual Transfer Function INL < 0 Ideal Transfer Function INL < 0 DAC Output |
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