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10F222 数据表(PDF) 21 Page - Microchip Technology |
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10F222 数据表(HTML) 21 Page - Microchip Technology |
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21 / 86 page ![]() © 2007 Microchip Technology Inc. DS41270E-page 19 PIC10F220/222 4.7 Program Counter As a program instruction is executed, the Program Counter (PC) will contain the address of the next program instruction to be executed. The PC value is increased by one every instruction cycle, unless an instruction changes the PC. For a GOTO instruction, bits 8:0 of the PC are provided by the GOTO instruction word. The PC Latch (PCL) is mapped to PC<7:0>. For a CALL instruction or any instruction where the PCL is the destination, bits 7:0 of the PC again are provided by the instruction word. However, PC<8> does not come from the instruction word, but is always cleared (Figure 4-5). Instructions where the PCL is the destination or Modify PCL instructions, include MOVWF PC, ADDWF PC and BSF PC , 5. FIGURE 4-5: LOADING OF PC BRANCH INSTRUCTIONS 4.7.1 EFFECTS OF RESET The PC is set upon a Reset, which means that the PC addresses the last location in program memory (i.e., the oscillator calibration instruction). After executing MOVLW XX , the PC will roll over to location 0000h and begin executing user code. 4.8 Stack The PIC10F220 device has a 2-deep, 8-bit wide hardware PUSH/POP stack. The PIC10F222 device has a 2-deep, 9-bit wide hardware PUSH/POP stack. A CALL instruction will PUSH the current value of stack 1 into stack 2 and then PUSH the current PC value, incremented by one, into stack level 1. If more than two sequential CALL’s are executed, only the most recent two return addresses are stored. A RETLW instruction will POP the contents of stack level 1 into the PC and then copy stack level 2 contents into level 1. If more than two sequential RETLW’s are exe- cuted, the stack will be filled with the address previously stored in level 2. Note: Because PC<8> is cleared in the CALL instruction or any Modify PCL instruction, all subroutine calls or computed jumps are limited to the first 256 locations of any program memory page (512 words long). PC 87 0 PCL Instruction Word GOTO Instruction CALL or Modify PCL Instruction PC 87 0 PCL Instruction Word Reset to ‘0’ Note 1: The W register will be loaded with the lit- eral value specified in the instruction. This is particularly useful for the implementa- tion of data look-up tables within the program memory. 2: There are no Status bits to indicate stack overflows or stack underflow conditions. 3: There are no instructions mnemonics called PUSH or POP. These are actions that occur from the execution of the CALL and RETLW instructions. |
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