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LPC2124FBD64 数据表(PDF) 13 Page - NXP Semiconductors

部件名 LPC2124FBD64
功能描述  Single-chip 16/32-bit microcontrollers; 128/256 kB ISP/IAP flash with 10-bit ADC
PDF  40 Pages
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制造商  NXP [NXP Semiconductors]
网页  http://www.nxp.com
标志 NXP - NXP Semiconductors

LPC2124FBD64 数据表(HTML) 13 Page - NXP Semiconductors

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LPC2114_2124_6
© NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 06 — 10 December 2007
13 of 40
NXP Semiconductors
LPC2114/2124
Single-chip 16/32-bit microcontrollers
Vectored IRQs have the middle priority. Sixteen of the interrupt requests can be assigned
to this category. Any of the interrupt requests can be assigned to any of the 16 vectored
IRQ slots, among which slot 0 has the highest priority and slot 15 has the lowest.
Non-vectored IRQs have the lowest priority.
The VIC combines the requests from all the vectored and non-vectored IRQs to produce
the IRQ signal to the ARM processor. The IRQ service routine can start by reading a
register from the VIC and jumping there. If any of the vectored IRQs are requesting, the
VIC provides the address of the highest-priority requesting IRQs service routine,
otherwise it provides the address of a default routine that is shared by all the non-vectored
IRQs. The default routine can read another VIC register to see what IRQs are active.
6.5.1 Interrupt sources
Table 4 lists the interrupt sources for each peripheral function. Each peripheral device has
one interrupt line connected to the Vectored Interrupt Controller, but may have several
internal interrupt flags. Individual interrupt flags may also represent more than one
interrupt source.
Table 4.
Interrupt sources
Block
Flag(s)
VIC channel #
WDT
Watchdog Interrupt (WDINT)
0
-
Reserved for software interrupts only
1
ARM Core
EmbeddedICE, DbgCommRx
2
ARM Core
EmbeddedICE, DbgCommTx
3
Timer 0
Match 0 - 3 (MR0, MR1, MR2, MR3)
Capture 0 - 3 (CR0, CR1, CR2, CR3)
4
Timer 1
Match 0 - 3 (MR0, MR1, MR2, MR3)
Capture 0 - 3 (CR0, CR1, CR2, CR3)
5
UART0
Rx Line Status (RLS)
Transmit Holding Register empty (THRE)
Rx Data Available (RDA)
Character Time-out Indicator (CTI)
6
UART1
Rx Line Status (RLS)
Transmit Holding Register empty (THRE)
Rx Data Available (RDA)
Character Time-out Indicator (CTI)
Modem Status Interrupt (MSI)
7
PWM0
Match 0 - 6 (MR0, MR1, MR2, MR3, MR4, MR5, MR6)
8
I2C-bus
SI (state change)
9
SPI0
SPIF, MODF
10
SPI1 and SSP[1]
SPIF, MODF and TXRIS, RXRIS, RTRIS, RORRIS
11
PLL
PLL Lock (PLOCK)
12
RTC
RTCCIF (Counter Increment), RTCALF (Alarm)
13



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