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STM8S207MB 数据表(PDF) 14 Page - STMicroelectronics |
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STM8S207MB 数据表(HTML) 14 Page - STMicroelectronics |
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14 / 103 page ![]() Product overview STM8S207xx, STM8S208xx 14/103 Doc ID 14733 Rev 9 4.2 Single wire interface module (SWIM) and debug module (DM) The single wire interface module and debug module permits non-intrusive, real-time in- circuit debugging and fast memory programming. SWIM Single wire interface module for direct access to the debug module and memory programming. The interface can be activated in all device operation modes. The maximum data transmission speed is 145 bytes/ms. Debug module The non-intrusive debugging module features a performance close to a full-featured emulator. Beside memory and peripherals, also CPU operation can be monitored in real- time by means of shadow registers. ● R/W to RAM and peripheral registers in real-time ● R/W access to all resources by stalling the CPU ● Breakpoints on all program-memory instructions (software breakpoints) ● Two advanced breakpoints, 23 predefined configurations 4.3 Interrupt controller ● Nested interrupts with three software priority levels ● 32 interrupt vectors with hardware priority ● Up to 37 external interrupts on six vectors including TLI ● Trap and reset interrupts |
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