PCA9541ADSLASH03 datasheet(6/41 Pages) NXP

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PCA9541A_3

Product data sheet

Rev. 03 — 16 July 2009

6 of 41

NXP Semiconductors

PCA9541A

2-to-1 I2C-bus master selector with interrupt logic and reset

7.2 Pin description

[1]

HVQFN16 package die supply ground is connected to both the VSS pin and the exposed center pad. The

VSS pin must be connected to supply ground for proper device operation. For enhanced thermal, electrical,

and board-level performance, the exposed pad needs to be soldered to the board using a corresponding

thermal pad on the board, and for proper heat conduction through the board thermal vias need to be

incorporated in the printed-circuit board in the thermal pad region.

Table 3.

Pin description

Symbol

Description

SO16,

TSSOP16

HVQFN16

INT0

active LOW interrupt output 0 (external pull-up required)

SDA_MST0

serial data master 0 (external pull-up required)

SCL_MST0

serial clock master 0 (external pull-up required)

RESET

active LOW reset input (external pull-up required)

SCL_MST1

serial clock master 1 (external pull-up required)

SDA_MST1

serial data master 1 (external pull-up required)

INT1

active LOW interrupt output 1 (external pull-up required)

VSS

86[1]

supply ground

address input 0 (externally held to VSS or VDD)

address input 1 (externally held to VSS or VDD)

address input 2 (externally held to VSS or VDD)

address input 3 (externally held to VSS or VDD)

SCL_SLAVE

serial clock slave (external pull-up required)

SDA_SLAVE

serial data slave (external pull-up required)

INT_IN

active LOW interrupt input (external pull-up required)

VDD

supply voltage

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