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PCF8811MU/2DA/1 数据表(PDF) 21 Page - NXP Semiconductors

部件名 PCF8811MU/2DA/1
功能描述  80 x 128 pixels matrix LCD driver
PDF  81 Pages
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制造商  NXP [NXP Semiconductors]
网页  http://www.nxp.com
标志 NXP - NXP Semiconductors

PCF8811MU/2DA/1 数据表(HTML) 21 Page - NXP Semiconductors

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PCF8811_4
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 04 — 27 June 2008
21 of 81
NXP Semiconductors
PCF8811
80 x 128 pixels matrix LCD driver
The Y address counter does not auto-increment in the basic command set. The counter
stops when a complete bank has been written to. In this case the Y address counter must
be set; for Y address, see Table 10. To write the next bank, see Figure 6.
When only a part of the RAM is used, both X (Xmax) and Y (Ymax) addresses can be set.
The data order in the basic command set is as defined in Figure 6.
8.1.2 Extended command set
8.1.2.1
Horizontal/vertical addressing
Two different address modes are possible with the extended command set: horizontal
address mode and vertical address mode.
In the horizontal address mode (V = 0) the X address increments after each byte. After the
last X address, X wraps around to 0 and Y increments to address the next row;
see Figure 7. The number of columns (last X address) after which the wrap around must
occur can be programmed. In Figure 7 it can be seen that the X address is programmed
as 127, and the Y address is programmed as 9. With Xmax and Ymax the X and Y
addresses can be programmed while the whole RAM is not being used.
In the vertical addressing mode (V = 1) the Y address increments after each byte. After
the last Y address (Y = 9), Y wraps around to 0 and X increments to address the next
column; see Figure 8. The last Y address, after which Y wraps to 0, can be programmed.
In Figure 8 it can be seen that the X address is programmed as 127, and the Y address is
programmed as 9. With Xmax and Ymax the X and Y addresses can be programmed while
the whole RAM is not being used.
After the very last address, the address pointers wrap around to addressX=0andY=0
in both horizontal and vertical addressing modes.
Fig 6.
Sequence of writing data bytes into the RAM (basic command set)
mgw735
0
Y max
0
X max
X address
Y address
LSB
MSB
LSB
MSB



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