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ZXCD1000 数据表(PDF) 4 Page - Zetex Semiconductors |
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ZXCD1000 数据表(HTML) 4 Page - Zetex Semiconductors |
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4 / 16 page ![]() ISSUE 2 - APRIL 2002 ZXCD1000 Class D controller IC A functional block diagram of the ZXCD1000 is shown in Figure 2. The on chip series regulators drop the external VCC supply (12V-18V) to the approximate 9V (9VA/9VB) and 5.5V (5V5) supplies required by the internal circuitry. A triangular waveform is generated on chip and is brought out at the OscA and OscB outputs. The frequency of this is set (to ~200kHz) by an external capacitor (Cosc) and on chip resistor. The triangular waveform must be externally AC coupled back into the ZXCD1000 at the TriangleA and TriangleB inputs. AC coupling ensures symmetrical operation resulting in minimal system DC offsets. TriangleA is connected to one of the inputs of a comparator and TriangleB is connected to one of the inputs of a second comparator. The other inputs of these two comparators are connected to the AudioA and AudioB inputs, which are anti-phase signals externally derived from the audio input. The triangular wave is an order higher in frequency than the audio input (max 20kHz). The outputs of the comparators toggle every time the TriangleA/B and the (relatively slow) AudioA/B signals cross. ZXCD1000 4 Oscillator & Ramp Generator Internal 5V5 Internal 9V PWM Comp A PWM Comp B Pre- Driver Pre- Driver O/P Driver O/P Driver Audio A Audio B VCC Out A Out B 1 2 3 45 6 7 8 9 10 11 12 13 14 15 16 Osc Buffers Figure 2. Functional Block Diagram |
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