PIC18F46J50 FAMILY

DS80436C-page 2

 2010 Microchip Technology Inc.

TABLE 2:

SILICON ISSUE SUMMARY

Module

Feature

Item

Number

Issue Summary

Affected

A2

A4

MSSP

Modes

1.

Must keep LATB<5:4> bits clear.

X

MSSP

2.

Module may not receive the correct data if there

is a delay in reading SSPxBUF after SSPxIF

interrupt.

XX

EUSART

Enable/Dis-

able

3.

after re-enabling the module.

XX

A/D

Clock

4.

linearity error limits.

XX

PMP

PSP

5.

Incorrect data capture in Slave modes.

X

Low-Power

modes

Deep Sleep

6.

Wake-up events that occur during Deep Sleep

entry may not generate an event.

XX

DC

Characteristics

Supply Volt-

age

7.

“F” devices is 2.25V.

X

A/D

Band Gap

Reference

8.

conversion on Channel 15 could have issues.

XX

CTMU

Constant

Current

9.

Low voltages turn off constant current source.

X

Note 1:

Only those issues indicated in the last column apply to the current silicon revision.