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STP16DPS05 数据表(PDF) 20 Page - STMicroelectronics |
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STP16DPS05 数据表(HTML) 20 Page - STMicroelectronics |
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20 / 34 page ![]() Detection mode functionality STP16DPS05 20/34 Doc ID 16538 Rev 2 Figure 19. Error detection sequence LE/DM1 and OE/DM2 Key Sequence necessary to Enter in EDM 16 CLK pulse are required to load the data setting 1 into shift register The LE/DM1 pulse latch the data loaded during the previous state During the error detection are necessary at least 2 CLK signal plus oneat the end Every CLK pulse shows the results of single Output results:Out15;14; 13 etc. etc After OE/DM2 signal turn High the the device from EDM to Normal Mode 16 CLK pulse are required to load the data setting 1 into shift register During the error detection are necessary at least 2 CLK signal plus oneat the end Every CLK pulse shows the results of single Output results:Out15;14; 13 etc. etc SDO pin show the results of Error Detection (Open or Short in this case) The OE/DM2 Pulse put the device from EDM to Normal Mode |
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